ICS9DB401BGLF IDT, Integrated Device Technology Inc, ICS9DB401BGLF Datasheet - Page 8

IC BUFFER 4OUTPUT DIFF 28-TSSOP

ICS9DB401BGLF

Manufacturer Part Number
ICS9DB401BGLF
Description
IC BUFFER 4OUTPUT DIFF 28-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Buffer/Driverr
Datasheet

Specifications of ICS9DB401BGLF

Input
Clock
Output
Clock
Frequency - Max
333.33MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-TSSOP
Frequency-max
333.33MHz
Number Of Elements
1
Supply Current
200mA
Pll Input Freq (min)
50MHz
Pll Input Freq (max)
200MHz
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
0C to 70C
Package Type
TSSOP
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.465V
Operating Temperature Classification
Commercial
Pin Count
28
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
9DB401BGLF

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ICS9DB401BGLF
Quantity:
35
Part Number:
ICS9DB401BGLFT
Manufacturer:
ICS
Quantity:
20 000
How to Write:
• Controller (host) sends a start bit.
• Controller (host) sends the write address DC
• ICS clock will acknowledge
• Controller (host) sends the begining byte location = N
• ICS clock will acknowledge
• Controller (host) sends the data byte count = X
• ICS clock will acknowledge
• Controller (host) starts sending Byte N through
• ICS clock will acknowledge each byte one at a time
• Controller (host) sends a Stop bit
1014B—09/07/06
Byte N + X -1
(see Note 2)
WR
P
T
Beginning Byte N
Data Byte Count = X
Index Block Write Operation
Slave Address DC
Beginning Byte = N
Byte N + X - 1
Controller (Host)
General SMBus serial interface information for the ICS9DB401
Integrated
Circuit
Systems, Inc.
starT bit
stoP bit
WRite
(H)
ICS (Slave/Receiver)
ACK
ACK
ACK
ACK
ACK
(H)
8
How to Read:
• Controller (host) will send start bit.
• Controller (host) sends the write address DC
• ICS clock will acknowledge
• Controller (host) sends the begining byte
• ICS clock will acknowledge
• Controller (host) will send a separate start bit.
• Controller (host) sends the read address DD
• ICS clock will acknowledge
• ICS clock will send the data byte count = X
• ICS clock sends Byte N + X -1
• ICS clock sends Byte 0 through byte X (if X
• Controller (host) will need to acknowledge each byte
• Controllor (host) will send a not acknowledge bit
• Controller (host) will send a stop bit
WR
location = N
was written to byte 8)
RD
RT
N
P
T
Slave Address DC
Slave Address DD
Index Block Read Operation
Beginning Byte = N
Controller (Host)
Not acknowledge
ACK
ACK
Repeat starT
starT bit
stoP bit
WRite
ReaD
(H)
(H)
.
ICS (Slave/Receiver)
Data Byte Count = X
Beginning Byte N
Byte N + X - 1
ICS9DB401
ACK
ACK
ACK
(H)
(H)
(H)

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