IDTCV126PAG IDT, Integrated Device Technology Inc, IDTCV126PAG Datasheet - Page 9

• Manufacturer Part Number: IDTCV126PAG
• Description: IC FLEXPC CLK PROGR P4 56-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: FlexPC™r
• Type: PC Clockr

Specifications of IDTCV126PAG

• Input: Crystal
• Output: Clock
• Frequency - Max: 400MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-TSSOP
• Frequency-max: 400MHz
• Number Of Elements: 3
• Supply Current: 400mA
• Pll Input Freq (min): 14.31818MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Package Type: TSSOP
• Output Frequency Range: 33.3 to 400MHz
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Commercial
• Pin Count: 56
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: CV126PAG

ELECTRICAL CHARACTERISTICS - INPUT / SUPPLY / COMMON OUTPUT
PARAMETERS
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: T
NOTES:
1. Input frequency should be measured at the REF output pin and tuned to ideal 14.31818MHz to meet ppm frequency accuracy on PLL outputs.
2. This parameter is guaranteed by design, but not 100% production tested.
3. See TIMING DIAGRAMS for timing requirements.
IDTCV126
PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR
Symbol
I
I
V
V
DD3.3OP
DD3.3PD
T
C
C
IH
IL
L
C
V
V
STAB
I
F
OUT
PIN
_FS
INX
_FS
IL
IH
IL
IN
I
Input HIGH Voltage
Input LOW Voltage
LOW Voltage, HIGH Threshold
LOW Voltage, LOW Threshold
Input LeakageCurrent
Operating Supply Current
Powerdown Current
Input Frequency
Pin Inductance
Input Capacitance
Clock Stabilization
Modulation Frequency
T
T
T
DRIVE
FALL
RISE
_PD
_PD
_PD
A
(2)
(2)
= 0°C to +70°C, Supply Voltage: V
(2)
Parameter
(2)
(1)
(2)
(2,3)
(2)
3.3V ± 5%
3.3V ± 5%
For FSA.B.C test_mode
0< V
Full active, C
All differential pairs driven
All differential pairs tri-stated
V
Logic inputs
Output pin capacitance
XTAL_IN and XTAL_OUT pins
From V
Triangular modulation
CPU output enable after PD de-assertion
Fall time of PD
Rise time of PD
For FSA.B.C test_mode
DD
IN
= 3.3V
< V
DD
DD
DD
power-up or de-assertion of PD to first clock
, no internal pull-up or pull-down
= 3.3V ± 5%
L
= full load
Test Conditions
9
COMMERCIAL TEMPERATURE RANGE
V
V
SS
SS
Min.
0.7
–5
—
—
—
—
—
—
—
—
—
30
—
—
—
2
- 0.3
- 0.3
14.31818
Typ.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
V
V
DD
DD
Max.
0.35
400
300
0.8
1.8
+5
70
12
—
33
7
5
6
5
5
5
+ 0.3
+ 0.3
MHz
Unit
KHz
µA
mA
mA
nH
ms
pF
us
ns
ns
V
V
V
V