IDTCV126PAG IDT, Integrated Device Technology Inc, IDTCV126PAG Datasheet

IC FLEXPC CLK PROGR P4 56-TSSOP

IDTCV126PAG

Manufacturer Part Number
IDTCV126PAG
Description
IC FLEXPC CLK PROGR P4 56-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Series
FlexPC™r
Type
PC Clockr
Datasheet

Specifications of IDTCV126PAG

Input
Crystal
Output
Clock
Frequency - Max
400MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-TSSOP
Frequency-max
400MHz
Number Of Elements
3
Supply Current
400mA
Pll Input Freq (min)
14.31818MHz
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
0C to 70C
Package Type
TSSOP
Output Frequency Range
33.3 to 400MHz
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.465V
Operating Temperature Classification
Commercial
Pin Count
56
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
CV126PAG

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDTCV126PAG
Manufacturer:
BCD
Quantity:
30 630
FEATURES:
• One high precision PLL for CPU, SSC, and N programming
• One high precision PLL for SRC/PCI, SSC, and N programming
• One high precision PLL for 48MHz
• Band-gap circuit for differential outputs
• Support spread spectrum modulation, down spread 0.5% and
• Support SMBus block read/write, index read/write
• Selectable output strength for REF, 48MHz, PCI
• Allows for CPU frequency to change to a higher frequency for
• Available in SSOP and TSSOP packages
OUTPUTS:
• 4*0.7V current –mode differential CPU CLK pair
• 5*0.7V current –mode differential SRC CLK pair
• 7*PCI, 3 free running, 33.3MHz
• 1*48MHz
• 2*REF
FUNCTIONAL BLOCK DIAGRAM
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
© 2005 Integrated Device Technology, Inc.
IDTCV126
PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR
others
maximum system computing power
V
TT_PWRGD
XTAL_OUT
XTAL_IN
FSA.B.C
SDATA
SCLK
#/PD
Controller
Osc Amp
SM Bus
Control
XTAL
Logic
PROGRAMMABLE FLEXPC
CLOCK FOR P4 PROCESSOR
N Programmable
N Programmable
PLL3
PLL1
SSC
PLL2
SSC
1
DESCRIPTION:
support up to 400MHz processor. This chip has three PLLs inside for CPU,
SRC/PCI, and 48MHz IO clocks. This device also implements Band-gap
referenced I
which can provide more robust system performance. Each CPU and SRC/
PCI has its own Spread Spectrum selection, which allows for isolated changes
instead of affecting other clock groups.
KEY SPECIFICATIONS:
• CPU/SRC CLK cycle to cycle jitter < 50ps
• PCI CLK cycle to cycle jitter < 500ps
IDTCV126 is a 56 pin clock device. The CPU output buffer is designed to
Output Buffers
Output Buffer
Output BUffer
Stop Logic
Stop Logic
SRC CLK
CPU CLK
48MHz
REF
I
I
to reduce the impact of V
REF
REF
COMMERCIAL TEMPERATURE RANGE
DD
PCI[3:0], PCIF[2:0]
SRC[4:0]
variation on differential outputs,
CPU[3:0]
REF[1:0]
48MHz
JUNE 22, 2006
IDTCV126
DSC 6581/9

Related parts for IDTCV126PAG

IDTCV126PAG Summary of contents

Page 1

IDTCV126 PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR FEATURES: • One high precision PLL for CPU, SSC, and N programming • One high precision PLL for SRC/PCI, SSC, and N programming • One high precision PLL for 48MHz • Band-gap circuit ...

Page 2

IDTCV126 PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR PIN CONFIGURATION V _PCI _PCI PCI0 4 PCI1 5 PCI2 6 PCI3 V _PCI _PCI 8 DD PCIF0 9 PCIF1 ...

Page 3

IDTCV126 PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR FREQUENCY SELECTION TABLE FSC CPU 101 100 001 133 011 166 010 200 000 266 100 333 110 400 111 Reserved RESOLUTION CPU (MHz) Resolution 100 0.666667 133 0.666667 166 1.333333 ...

Page 4

IDTCV126 PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR BYTE 0 Bit Output(s) Affected 0 SRCT0, SRCC0 1 SRCT1, SRCC1 2 SRCT2, SRCC2 3 SRCT3, SRCC3 4 SRCT4, SRCC4 5 Reserved 6 Reserved 7 Reserved BYTE 1 Bit Output(s) Affected 0 Spread ...

Page 5

IDTCV126 PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR BYTE 3 Bit Output(s) Affected 0 SRCT0, SRCC0 1 SRCT1, SRCC1 2 SRCT2, SRCC2 3 SRCT3, SRCC3 4 SRCT4, SRCC4 5 PCIF0 6 PCIF1 7 PCIF2 BYTE 4 Bit Output(s) Affected 0 CPUT0, ...

Page 6

IDTCV126 PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR BYTE 6 Bit Output(s) Affected Software PCI_STOP 4 REFstr1 5 Reserved 6 7 BYTE 7 Bit Output(s) Affected BYTE 8 (BLOCK ...

Page 7

IDTCV126 PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR BYTE 9 Bit Output(s) Affected 0 SRC SMC0 1 SRC SMC1 2 SRC SMC2 3 Reserved 4 CPU SMC0 5 CPU SMC1 6 CPU SMC2 7 Reserved BYTE 10 Bit Output(s) Affected 0 ...

Page 8

IDTCV126 PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR BYTE 13 Bit Output(s) Affected 0 Test_scl 1 2 Reserved 3 Reserved Reserved BYTE 62 = 61h BYTE 63 = 12h Description / Function 0 On chip test mode ...

Page 9

IDTCV126 PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR ELECTRICAL CHARACTERISTICS - INPUT / SUPPLY / COMMON OUTPUT PARAMETERS Following Conditions Apply Unless Otherwise Specified: Operating Condition 0°C to +70°C, Supply Voltage Symbol Parameter V Input HIGH Voltage ...

Page 10

IDTCV126 PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR ELECTRICAL CHARACTERISTICS - CPU AND SRC 0.7 CURRENT MODE DIFFERENTIAL PAIR (1) Following Conditions Apply Unless Otherwise Specified: Operating Condition 0°C to +70°C, Supply Voltage Symbol Parameter Z Current ...

Page 11

IDTCV126 PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR ELECTRICAL CHARACTERISTICS - CPU AND SRC 0.7 CURRENT MODE DIFFERENTIAL PAIR, CONTINUED Following Conditions Apply Unless Otherwise Specified: Operating Condition 0°C to +70°C, Supply Voltage Symbol Parameter (2) Skew, ...

Page 12

IDTCV126 PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR ELECTRICAL CHARACTERISTICS, 48MHZ Following Conditions Apply Unless Otherwise Specified: Operating Condition 0°C to +70°C, Supply Voltage Symbol Parameter (1,2) ppm Static Error (2) T Clock Period PERIOD V Output ...

Page 13

IDTCV126 PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR PCI STOP FUNCTIONALITY If PCIF (2:0) and SRC clocks are set to be free-running through SMBus programming, they will ignore the PCI_STOP register bit. PCI_STOP (Byte 6 bit 3) 1 Normal 0 Normal ...

Page 14

IDTCV126 PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR PD DE-ASSERTION The time from the de-assertion until power supply ramps to get stable clocks will be less than 1.8ms. If the drive mode control bit for PD tristate is ...

Page 15

IDTCV126 PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR ORDERING INFORMATION IDTCV XXX XX Device Type Package CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 X Grade Commercial Temperature Range Blank (0°C to +70°C) Small Shrink Outline Package PV ...

Page 16

IDTCV126 PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR September 08, 2006 Updated CPU/SRC CLK cycle to cycle jitter specs to 50ps. June 22, 2007 Updated PCI CLK cycle to cycle jitter specs to 500ps. REVISION HISTORY 16 COMMERCIAL TEMPERATURE RANGE ...

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