IDTCV126PAG IDT, Integrated Device Technology Inc, IDTCV126PAG Datasheet - Page 7

• Manufacturer Part Number: IDTCV126PAG
• Description: IC FLEXPC CLK PROGR P4 56-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: FlexPC™r
• Type: PC Clockr

Specifications of IDTCV126PAG

• Input: Crystal
• Output: Clock
• Frequency - Max: 400MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-TSSOP
• Frequency-max: 400MHz
• Number Of Elements: 3
• Supply Current: 400mA
• Pll Input Freq (min): 14.31818MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Package Type: TSSOP
• Output Frequency Range: 33.3 to 400MHz
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Commercial
• Pin Count: 56
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: CV126PAG

BYTE 10
NOTE:
1. The default value depends on the value of frequency select signals FSA, FSB, and FSC at power-on.
BYTE 11
BYTE 12
BYTE 9
IDTCV126
PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR
Bit
Bit
Bit
Bit
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Output(s) Affected
Output(s) Affected
Output(s) Affected
Output(s) Affected
CPU_N7, MSB
SRC_N7, MSB
CPU_N0, LSB
SRC_N0, LSB
CPU SMC0
CPU SMC1
CPU SMC2
SRC SMC0
SRC SMC1
SRC SMC2
48MHzStr0
48MHStr1
PCIStrC0
PCIStrC1
CPU_N1
CPU_N2
CPU_N3
CPU_N4
CPU_N5
CPU_N6
Reserved
Reserved
SRC_N1
SRC_N2
SRC_N3
SRC_N4
SRC_N5
SRC_N6
Reserved
PCIFStr0
PCIFStr1
REFStr0
Description / Function
Work with Byte 6 Bit 4 REFstr1
USB48MHz strength selection
CPU CLK = N* Resolution
CPU CLK = N* Resolution
(see SMC table)
(see SMC table)
Description / Function
Description / Function
Description / Function
PCIF strength selection
PCI strength selection
SSC control
SSC control
( see strength table)
7
0
0
0
0
COMMERCIAL TEMPERATURE RANGE
1
1
1
1
Type
Type
Type
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Power On
Power On
Power On
Power On
0
1
1
0
1
0
0
1
0
1
1
0
1
0
0
1
1
1
1
0
0
1
0
1
1
0
0
0
1
0
0
0
(1)