ICS950405AFLFT IDT, Integrated Device Technology Inc, ICS950405AFLFT Datasheet

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ICS950405AFLFT

Manufacturer Part Number
ICS950405AFLFT
Description
IC SYSTEM CLK CHIP AMD-K8 48SSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Timing Control Hubr
Datasheet

Specifications of ICS950405AFLFT

Input
Crystal
Output
Clock
Frequency - Max
300MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-SSOP
Frequency-max
300MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
950405AFLFT
AMD - K8™ System Clock Chip
Recommended Application:
AMD K8 System Clock with AMD, VIA or ALI Chipset
Output Features:
Functionality
0802F—04/22/05
FS3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
2 - Differential pair push-pull CPU clocks @
3.3V
9 - PCICLK (Including 1 free running) @ 3.3V
3 - Selectable PCICLK/HTTCLK @ 3.3V
1 - HTTCLK @ 3.3V
1 - 48MHz @ 3.3V fixed.
1 - 24/48MHz @ 3.3V
3 - REF @ 3.3V, 14.318MHz.
FS2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
FS1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Integrated
Circuit
Systems, Inc.
FS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
100.90
133.90
168.00
202.00
100.20
133.50
166.70
200.40
150.00
180.00
210.00
240.00
270.00
233.33
266.67
300.00
CPU
MHz
67.27
66.95
67.20
67.33
66.80
66.75
66.68
66.80
60.00
60.00
70.00
60.00
67.50
66.67
66.67
75.00
MHz
HTT
33.63
33.48
33.60
33.67
33.40
33.38
33.34
33.40
30.00
30.00
35.00
30.00
33.75
33.33
33.33
37.50
MHz
PCI
*ModeB/PCICLK8/HTTCLK1 7
PCICLK11/HTTCLK3 11
PCICLK9/HTTCLK2 8
*ModeA/HTTCLK0 6
Features:
2X
This Output has 2X Default Drive and can be programmaed lower via IIC
Programmable output frequency.
Programmable output divider ratios.
Programmable output rise/fall time.
Programmable output skew.
Programmable spread percentage for EMI control.
Watchdog timer technology and RESET# output to
reset system
if system malfunctions.
Programmable watch dog safe frequency.
Support I
operations.
Uses external 14.318MHz crystal.
Supports Hyper Transport Technology (HTTCLK).
*FS0/REF0 1
2X
2X
2X
2X
PCICLK10 12
PCICLK0 13
PCICLK1 14
PCICLK2 17
PCICLK3 18
PCICLK4 21
PCICLK5 22
PCICLK6 23
PCICLK7 24
VDDHTT 2
VDDPCI 9
VDDPCI 16
VDDPCI 19
GND 5
GND 10
GND 15
GND 20
X1 3
X2 4
2
C Index read/write and block read/write
Pin Configuration
* Internal Pull-Up Resistor
48-SSOP
48 REF1/FS1*
47 GND
46 VDDREF
45 REF2/FS2*
44 Reset#
43 VDDA
42 GND
41 CPUCLK8T0
40 CPUCLK8C0
39 GND
38 VDDCPU
37 CPUCLK8T1
36 CPUCLK8C1
35 VDDCPU
34 GND
33 GND
32 PD#*
31 48MHz/FS3**
30 GND
29 AVDD48
28 24_48MHz/Sel24_48#*
27 GND
26 SDATA
25 SCLK
ICS950405

Related parts for ICS950405AFLFT

ICS950405AFLFT Summary of contents

Page 1

Integrated Circuit Systems, Inc. AMD - K8™ System Clock Chip Recommended Application: AMD K8 System Clock with AMD, VIA or ALI Chipset Output Features: • Differential pair push-pull CPU clocks @ 3.3V • PCICLK (Including 1 ...

Page 2

ICS950405 Pin Descriptions PIN # PIN NAME TYPE 1 *FS0/REF0 2 VDDHTT PWR OUT 5 GND PWR 6 *ModeA/HTTCLK0 7 *ModeB/PCICLK8/HTTCLK1 PCICLK9/HTTCLK2 8 OUT 9 VDDPCI PWR 10 GND PWR 11 PCICLK11/HTTCLK3 12 PCICLK10 OUT PCICLK0 ...

Page 3

General Description The ICS950405 is a main system clock solution for desktop designs using the AMD K8 CPU. It provides all necessary clock signals for Clawhammer and Sledgehammer with AMD, VIA or ALI systems. The ICS950405 is part of a ...

Page 4

ICS950405 Power Groups Pin Number VDD GND 16,19 15,20 29 27,30,33 35,38 34, Analog, CPU PLL, MCLK 46 47 Mode Functionality Tables ModeA ModeB Pin7 0 0 HTTCLK1 0 1 HTTCLK1 1 0 PCICLK8 ...

Page 5

General I How to Write: • Controller (host) sends a start bit. • Controller (host) sends the write address D2 • ICS clock will acknowledge • Controller (host) sends the begining byte location = N • ICS clock will acknowledge ...

Page 6

ICS950405 Table: Frequency Select Register Byte 0 Pin # Name - SS_EN Bit 7 - SEL24_48MHz Bit 6 - Reserved Bit 5 - Reserved Bit 4 - Bit 3 - Bit 2 - Bit 1 - Bit ...

Page 7

I C Table: Output Control Register Byte 4 Pin # - Bit 7 - Bit 6 - Bit 5 - Bit 4 - Bit 3 - Bit 2 - Bit 1 - Bit Table: Reserved ...

Page 8

ICS950405 Table: Skew Control Register Byte 8 Pin # Name - PCI/HTTSkw3 Bit 7 - PCI/HTTSkw2 Bit 6 - PCI/HTTSkw1 Bit 5 - PCI/HTTSkw0 Bit 4 - PCISkw3 Bit 3 - PCISkw2 Bit 2 - PCISkw1 Bit ...

Page 9

I C Table: VCO Frequency Control Register Byte 12 Pin # Name - N Div7 Bit Div6 Bit Div5 Bit Div4 Bit Div3 Bit ...

Page 10

ICS950405 Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 3.8V Logic Inputs . . . . . . ...

Page 11

Electrical Characteristics - K8 Push Pull Differential Pair 70° 3.3 V +/-5 PARAMETER SYMBOL δV/δt Rising Edge Rate δV/δt Falling Edge Rate V Differential Voltage DIFF Change in V ∆V DIFF_DC ...

Page 12

ICS950405 Electrical Characteristics - PCICLK 70° 3.3 V,+/-5 PARAMETER SYMBOL Output High Voltage V OH1 Output Low Voltage V OL1 Output High Current I OH1 Output Low Current I OL1 1 ...

Page 13

Electrical Characteristics - AGPCLK 70°C; VDD=3.3V +/-5 PARAMETER SYMBOL Output Frequency Output Impedance R DSP1 1 Output High Voltage Output Low Voltage Output High Current ...

Page 14

ICS950405 Shared Pin Operation - Input/Output Pins The I/O pins designated by (input/output) on the ICS950405 serve as dual signal functions to the device. During initial power-up, they act as input pins. The logic level (voltage) that is present on ...

Page 15

INDEX INDEX AREA AREA 45° 45° SEATING SEATING b PLANE PLANE .10 (.004) C .10 (.004) C 300 mil SSOP Package Ordering Information ICS950405yFLF-T Example: ...

Page 16

ICS950405 Revision History Rev. Issue Date Description 0.1 4/21/2005 Updated Byte 11/12 M/N programming description 0802F—04/22/05 16 Page # 8-9 ...

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