SR1530HCLR Intel (CPU), SR1530HCLR Datasheet - Page 50

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SR1530HCLR

Manufacturer Part Number
SR1530HCLR
Description
Manufacturer
Intel (CPU)
Datasheet

Specifications of SR1530HCLR

Lead Free Status / RoHS Status
Not Compliant
Power and Environmental Specifications
8.2.8
The output voltages shall remain within limits for the step loading and capacitive loading
specified in the table below. The load transient repetition rate shall be tested between 50 Hz
and 5 kHz at duty cycles ranging from 10%-90%. The load transient repetition rate is only a test
specification. The Δ step load may occur anywhere within the MIN load to the MAX load
conditions.
Notes:
8.2.9
The power supply shall be stable and meet all requirements with the following capacitive
loading ranges.
8.2.10
The power supply shall be unconditionally stable under all line/load/transient load conditions
including capacitive load ranges. A minimum of: 45 degrees phase margin and -10 dB gain
margin is required. The power supply manufacturer shall provide proof of the unit’s closed-loop
stability with local sensing through the submission of bode plots. Closed-loop stability must be
ensured at the maximum and minimum loads as applicable.
8.2.11
The common mode noise on any output shall not exceed 350 mV pk-pk over the frequency
band of 10 Hz to 30 MHz.
40
1.
2.
Step loads on each 12 V output may happen simultaneously.
The +12 V should be tested with 2200 μF evenly split between the four +12 V rails.
+5 VSB
Output
+3.3 V
+5 V
12 V
Dynamic Loading
Capacitive Loading
Closed-Loop Stability
Common Mode Noise
+5 VSB
Output
+3.3 V
+12 V
-12 V
+5 V
Table 35. Capacitive Loading Conditions
Table 34. Transient Load Requirements
Δ Step Load Size
(See note 2)
Intel order number: D64569-006
18.0 A
6.0 A
4.0 A
0.5 A
Minimum
500 each
250
400
20
1
Load Slew Rate
0.25 A/μsec
0.25 A/μsec
0.25 A/μsec
0.25 A/μsec
Maximum
11,000
6,800
4,700
350
350
Intel
®
Server Board S5000VCL TPS
Units
Test Capacitive Load
μF
μF
μF
μF
μF
2200 μF
250 μF
400 μF
20 μF
1, 2
Revision 2.2