MT9P031I12STM-ES Aptina LLC, MT9P031I12STM-ES Datasheet - Page 7

• Manufacturer Part Number: MT9P031I12STM-ES
• Manufacturer: Aptina LLC

Specifications of MT9P031I12STM-ES

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Figure 2:
Figure 3:
PDF: 09005aef81a4a477/Source: 09005aef81a4a495
MT9P031_DS - Rev. E 7/10 EN
Typical Configuration (Connection)
48-Pin iLCC 10 x 10 Package Pinout Diagram (Top View)
Notes:
1. A resistor value of 1.5kΩ is recommended, but may be greater for slower two-wire speed.
2. All power supplies should be adequately decoupled.
3. All D
controller
STANDBY_BAR
FRAME_VALID
LINE_VALID
RESET_BAR
From
Master
TRIGGER
clock
GND
STROBE
V
S
DD_
D
ADDR
V
GND
pins must be tied together, as must all A
NC
OE
DD
IO
10
11
12
14
15
16
17
18
13
7
8
9
19
6
20
5
21
4
1μF
22
3
7
23
2
S
RESET_BAR
STANDBY_BAR
SCLK
S
TRIGGER
EXTCLK
OE
ADDR
DATA
24
V
1
DD
48
_IO
25
MT9P031: 1/2.5-Inch 5Mp Digital Image Sensor
2,3
47
26
V
GND
46
27
DD 2,3
pins, all V
28
45
V
D
AA 2,3
44
29
OUT
STROBE
Aptina reserves the right to change products or specifications without notice.
PIXCLK
30
43
[11:0]
DD
42
41
40
39
38
37
36
35
34
33
32
31
FV
_IO pins, and all V
LV
D
D
D
V
D
D
D
D
D
D
PIXCLK
EXTCLK
DD_
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IO
8
7
6
5
4
3
2
1
0
©2005 Aptina Imaging Corporation. All rights reserved.
Functional Overview
To
controller
DD
pins.