MT9P031I12STM-ES Aptina LLC, MT9P031I12STM-ES Datasheet - Page 15

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MT9P031I12STM-ES

Manufacturer Part Number
MT9P031I12STM-ES
Description
Manufacturer
Aptina LLC
Datasheet

Specifications of MT9P031I12STM-ES

Lead Free Status / RoHS Status
Supplier Unconfirmed
Frame Time
Table 8:
Table 9:
PDF: 09005aef81a4a477/Source: 09005aef81a4a495
MT9P031_DS - Rev. E 7/10 EN
Parameter
fps
t
t
W
H
SW
HB
VB
HB
VB
t
FRAME
ROW
PIXCLK
MIN
MIN
Frame Time
HB
Name
Frame Rate
Frame Time
Output Image Width
Output Image Height
Shutter Width
Horizontal Blanking
Vertical Blanking
Minimum Horizontal
Blanking
Minimum Vertical Blanking
Pixclk Period
Row Time
MIN
Values for Row_bin vs. Column_bin Settings
The pixel clock (PIXCLK) represents the time needed to sample 1 pixel from the array,
and is typically equal to 1 EXTCLK period. The sensor outputs data at the maximum rate
of 1 pixel per PIXCLK. One row time (
row to the first pixel output in the next row. The row time and frame time are defined by
equations in Table 8.
The minimum horizontal blanking (HB
Column_Bin settings are shown in Table 9.
Row_b
in
0
1
3
2 × ceil((Column_Size + 1) / (2 × (Column_Skip + 1)))
2 ×
2 × ceil((Row_Size + 1) / (2 × (Row_Skip + 1)))
max (1, (2 * 16 × Shutter_Width_Upper)
t
PIXCLK x max(((W/2) + max(HB, HB
346 × (Row_Bin + 1) + 64 + (W
(41 + 346 x (Row_Bin+1) + 99))
1488
450
796
(H + max(VB, VB
0
+ Shutter_Width_Lower)
Column_bin (W
15
Horizontal_Blank + 1
max (8, SW - H) + 1
Vertical_Blank + 1
1/
1/
Equation
t
t
f
ROW) is the period from the first pixel output in a
FRAME
PIXCLK
MT9P031: 1/2.5-Inch 5Mp Digital Image Sensor
MIN
MIN
1468
DC
430
776
) values for various Row_Bin and
)) ×
1
)
t
ROW
DC
/ 2)
Aptina reserves the right to change products or specifications without notice.
MIN
)),
1458
420
766
3
©2005 Aptina Imaging Corporation. All rights reserved.
Output Data Timing
Default Timing at
EXTCLK = 96 MHz
14
71.66ms
36.38
2592 PIXCLK
1944 rows
1943 rows
1 PIXCLK
26 rows
450 PIXCLK
9 rows
10.42ns
μ
s

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