CY7C374-100AC Cypress Semiconductor Corp, CY7C374-100AC Datasheet - Page 7

• Manufacturer Part Number: CY7C374-100AC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C374-100AC

• Family Name: FLASH370
• # Macrocells: 128
• Propagation Delay Time: 12ns
• Number Of Logic Blocks/elements: 8
• # I/os (max): 64
• In System Programmable: No
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: TQFP
• Memory Type: Flash
• Lead Free Status / RoHS Status: Not Compliant

Stated another way, the F
The simple timing model of the F
unexpected performance penalties.
Bus Hold Capabilities on all I/Os and Dedicated Inputs
A feature called bus-hold has been added to all F
and dedicated input pins. Bus-hold, which is an improved ver-
sion of the popular internal pull-up resistor, is a weak latch
connected to the pin that does not degrade the device’s per-
formance. As a latch, bus-hold recalls the last state of a pin
when it is three-stated, thus reducing system noise in bus-in-
terface applications. Bus-hold additionally allows unused de-
vice pins to remain unconnected on the board, which is partic-
ularly useful during prototyping as designers can route new
signals to the device without cutting trace connections to V
or GND.
F
ABEL is a trademark of Data I/O Corporation.
LOG/iC is a trademark of Isdata Corporation.
CUPL is a trademark of Logical Devices, Inc.
© Cypress Semiconductor Corporation, 2000. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
• no fanout delays
• no expander delays
• no dedicated vs. I/O pin delays
• no additional delay through PIM
• no penalty for using 0–16 product terms
• no added delay for steering product terms
• no added delay for sharing product terms
• no routing delays
• no output bypass delays
LASH
CLOCK
370, Warp, Warp Professional, Warp Enterprise, and UltraLogic are trademarks of Cypress Semiconductor Corporation.
Figure 8. Timing Model for CY7C371
t
S
= 5.0 ns
COMBINATORIALSIGNAL
REGISTEREDSIGNAL
t
LASH
PD
D,T,L
= 8.5 ns
370 features:
Q
LASH
370 family eliminates
t
CO
= 6.0 ns
LASH
flash370–8
370 I/Os
CC
Development Software Support
Warp
Warp is a state-of-the-art compiler and complete CPLD design
tool. For design entry, Warp provides an IEEE-STD-1076/1164
VHDL text editor, an IEEE-STD-1364 Verilog text editor, and a
graphical finite state machine editor. It provides optimized syn-
thesis and fitting by replacing basic circuits with ones pre-op-
timized for the target device, by implementing logic in unused
memory and by perfect communication between fitting and
synthesis. Warp provides other tools such as graphical timing
simulation and analysis.
Warp Professional
Warp Professional contains several additional features. It pro-
vides an extra method of design entry with its graphical block
diagram editor. It allows up to 5 ms timing simulation instead
of only 2 ms. It allows comparing of waveforms before and after
design changes.
Warp Enterprise
Warp Enterprise provides even more features. It provides un-
limited timing simulation and source-level behavioral simula-
tion as well as a debugger. It has the ability to generate graph-
ical HDL blocks from HDL text. It can even generate
testbenches.
Warp is available for PC and UNIX platforms. Some features
are not available in the UNIX version. For further information
see the Warp for PC, Warp for UNIX, Warp Professional and
Warp Enterprise data sheets.
Third-Party Software
Although Warp is a complete CPLD development tool on its
own, it interfaces with nearly every third party EDA tool. All
major third-party software vendors provide support for the
F
supplies vendors with all pertinent architectural information as
well as design fitters for our products.
Document #: 38-00215-G
LASH
™
370 family of devices. To expedite this support, Cypress
™
™
CPLD Family
F
LASH
370™