MC9S08SH16CTL Freescale, MC9S08SH16CTL Datasheet - Page 251

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MC9S08SH16CTL

Manufacturer Part Number
MC9S08SH16CTL
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S08SH16CTL

Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
SCI/SPI
Total Internal Ram Size
1KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
16-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
28
Package Type
TSSOP
Program Memory Type
Flash
Program Memory Size
16KB
Lead Free Status / RoHS Status
Compliant

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When BDM is active, the coherency mechanism is frozen (unless reset by writing to TPMxSC register)
such that the buffer latches remain in the state they were in when the BDM became active, even if one or
both halves of the modulo register are written while BDM is active. Any write to the modulo registers
bypasses the buffer latches and directly writes to the modulo register while BDM is active.
Reset the TPM counter before writing to the TPM modulo registers to avoid confusion about when the first
counter overflow will occur.
16.3.4
TPMxCnSC contains the channel-interrupt-status flag and control bits used to configure the interrupt
enable, channel configuration, and pin function.
Freescale Semiconductor
Reset
Reset
Reset
W
W
W
R
R
R
CHnF
Bit 15
Bit 7
TPM Channel n Status and Control Register (TPMxCnSC)
0
0
0
0
7
7
7
Figure 16-12. TPM Channel n Status and Control Register (TPMxCnSC)
= Unimplemented or Reserved
Figure 16-10. TPM Counter Modulo Register High (TPMxMODH)
Figure 16-11. TPM Counter Modulo Register Low (TPMxMODL)
CHnIE
14
0
6
0
0
6
6
6
MSnB
MC9S08SH32 Series Data Sheet, Rev. 2
13
5
0
5
5
0
5
0
PRELIMINARY
MSnA
12
0
4
0
0
4
4
4
ELSnB
11
0
3
0
0
3
3
3
Chapter 16 Timer/PWM Module (S08TPMV3)
ELSnA
10
0
2
0
0
2
2
2
1
9
0
1
1
0
1
0
0
Bit 8
Bit 0
0
0
0
0
0
0
0
251

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