LSI53CF92A LSI, LSI53CF92A Datasheet - Page 101
LSI53CF92A
Manufacturer Part Number
LSI53CF92A
Description
Manufacturer
LSI
Datasheet
1.LSI53CF92A.pdf
(158 pages)
Specifications of LSI53CF92A
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Table 5.6
Sequence Step
0 0 0
0 0 1
0 0 1
0 1 0
0 1 0
1 0 0
1 0 0
1 0 1
1 0 1
1 1 0
[2:0]
Target Selected with ATN Sequence (SCSI-2 Bit or Queue Tag Enable Bit
Set)
Interrupt Register
0 0 0 0 0 0 1 0
0 0 0 0 0 0 1 0
0 0 0 1 0 0 1 0
0 0 0 0 0 0 1 0
0 0 0 1 0 0 1 0
0 0 0 0 0 0 1 0
0 0 0 1 0 0 1 0
0 0 0 0 0 0 1 0
0 0 0 1 0 0 1 0
0 0 0 0 0 0 1 0
Table 5.6
Queue Tag Enable Bit set.
Disconnected State Command Group
Copyright © 1995–2002 by LSI Logic Corporation. All rights reserved.
[7:0]
lists the Target Selected with ATN Sequence, SCSI-2 Bit or
Interpretation
Selected with ATN/, stored bus ID and one message byte;
stopped due to either parity error or invalid ID message.
Initiator released ATN/ after one message byte received.
Stopped in Command phase due to parity error; some CDB
bytes not received; check Valid Group Code bit and FIFO flags.
Initiator released ATN/ after one message byte received.
Stopped in Command phase; parity error and ATN/ true.
Initiator released ATN/ after one message byte received.
Selection complete; received one message byte and the entire
command descriptor block.
Same as previous, initiator asserted ATN/ during Command
phase.
Parity error during second or third message byte.
ATN/ remained true after third message byte, or ATN/
remained true and invalid Queue tagged message (if Queue
Tagged Enable bit is set).
Received three message bytes, then stopped in Command
phase due to parity error; some CDB bytes not received;
check Valid Group Code bit and FIFO flags.
Stopped in Command phase; parity error and ATN/ true.
Selection complete; received three message bytes and the
entire command descriptor block.
5-9
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