LSI53CF92A LSI, LSI53CF92A Datasheet - Page 100
LSI53CF92A
Manufacturer Part Number
LSI53CF92A
Description
Manufacturer
LSI
Datasheet
1.LSI53CF92A.pdf
(158 pages)
Specifications of LSI53CF92A
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Table 5.4
Table 5.5
5-8
Sequence Step
Sequence Step
0 0 0
0 0 0
0 0 1
0 0 1
0 1 0
0 1 0
0 0 0
0 0 1
0 0 1
0 1 0
0 1 0
[2:0]
[2:0]
Target Selected without ATN Sequence
Target Selected with ATN Sequence (SCSI-2 Bit Not Set)
Interrupt Register
Interrupt Register
0 0 0 0 0 0 1 0
0 0 0 1 0 0 1 0
0 0 0 0 0 0 1 0
0 0 0 1 0 0 1 0
0 0 0 0 0 0 1 0
0 0 0 1 0 0 1 0
0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 1
0 0 0 1 0 0 0 1
0 0 0 0 0 0 0 1
0 0 0 1 0 0 0 1
Table 5.4
Table 5.5
Command Set
Copyright © 1995–2002 by LSI Logic Corporation. All rights reserved.
[7:0]
[7:0]
lists the Target Selected with ATN sequence, SCSI-2 bit not set.
lists the Target Selected without ATN sequence.
Interpretation
Selected with ATN/, stored bus ID and one message byte;
stopped due to either parity error or invalid ID message.
Selected with ATN/, stored bus ID and one message byte;
stopped because ATN/ remained true after first message byte.
Stopped in Command phase due to parity error; some CDB
bytes not received; check Valid Group Code bit and FIFO flags.
Stopped in Command phase; parity error and ATN/ true.
Selection complete; received one message byte and the
entire command descriptor block.
Same as previous; initiator asserted ATN/ during Command
phase.
Interpretation
Selected, loaded bus ID into FIFO, loaded null-byte message
into FIFO.
Stopped in Command phase due to parity error; some
command descriptor block bytes may not have been
received; check FIFO flags.
Same as previous; initiator asserted ATN/ during Command
phase.
Selected, received entire command descriptor block; check
Valid Group Code bit.
Same as previous; initiator asserted ATN/ during Command
phase.
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