LSI53CF92A LSI, LSI53CF92A Datasheet - Page 104
LSI53CF92A
Manufacturer Part Number
LSI53CF92A
Description
Manufacturer
LSI
Datasheet
1.LSI53CF92A.pdf
(158 pages)
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5.3.7 Reselect3 Sequence
Table 5.10
5.4 Initiator Command Group
5-12
Sequence Step
0 0 0
0 0 0
0 1 0
0 1 1
1 0 0
[2:0]
Initiator Select with ATN3 Sequence
Interrupt Register
0 0 1 0 0 0 0 0
0 0 0 1 1 0 0 0
0 0 0 1 1 0 0 0
0 0 0 1 1 0 0 0
0 0 0 1 1 0 0 0
This command reselects an initiator and sends three message bytes: a
one-byte Identify Message and a two-byte Queue Tag message. If DMA
is not enabled, the three message bytes must be loaded into the FIFO
before this command is issued.
Table 5.10
If the FSC is not in initiator state when it receives one of these
commands, the command is ignored, an Illegal Command interrupt is
generated, and the
of the
If BSY/ goes false while the FSC is connected as an initiator, it generates
a disconnected interrupt. The interrupt output occurs 1.5 to 3.5 CLK
cycles after BSY/ goes false.
Command Set
Copyright © 1995–2002 by LSI Logic Corporation. All rights reserved.
[7:0]
Command
lists the Initiator Select with ATN3 sequence.
Interpretation
Arbitration complete; selection time-out; disconnected.
Arbitration and selection complete; stopped because target did
not assert Message Out phase; ATN/ still asserted by FSC.
Sent 1, 2, or 3 message bytes; stopped because target
prematurely changed from Message Out phase or did not
assert Command phase after third message byte; ATN/
released only if third message byte was sent.
Stopped during command transfer due to premature phase
change; some CDB bytes may not have been sent; check
FIFO flags.
Selection with ATN3 Sequence complete. Three message
bytes and all command bytes were sent.
register on
Command
page
register is cleared. Refer to the description
4-8.
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