ISP1161A1BD,118 STEricsson, ISP1161A1BD,118 Datasheet - Page 65

• Manufacturer Part Number: ISP1161A1BD,118
• Manufacturer: STEricsson

Specifications of ISP1161A1BD,118

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Supplier Unconfirmed

Table 36.
ISP1161A1_4
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcHardwareConfiguration register: bit allocation
10.4.2 HcDMAConfiguration register (R/W: 21H/A1H)
EOTInput
Polarity
R/W
R/W
15
0
7
0
Table 37.
Code (Hex): 21 — read
Bit
15 to 13 -
12
11
10
9
8
7
6
5
4 to 3
2
1
0
DACKInput
reserved
Polarity
R/W
R/W
14
0
6
0
Symbol
2_DownstreamPort15Kr
esistorSel
SuspendClkNotStop
AnalogOCEnable
-
DACKMode
EOTInputPolarity
DACKInputPolarity
DREQOutputPolarity
DataBusWidth[1:0]
InterruptOutputPolarity
InterruptPinTrigger
InterruptPinEnable
HcHardwareConfiguration register: bit description
Polarity
Output
DREQ
R/W
R/W
13
0
5
1
Rev. 04 — 29 January 2009
resistorSel
2_Down
Port15K
stream
DataBusWidth[1:0]
R/W
R/W
12
0
4
0
Description
reserved
0 — use external 15 k resistors for downstream ports
1 — built-in resistors for downstream ports
0 — clock can be stopped
1 — clock can not be stopped
0 — use external OC detection. Digital input
1 — use on-chip OC detection. Analog input
reserved
0 — normal operation. DACK1 is used with read and write
signals
1 — reserved
0 — active LOW
1 — active HIGH
0 — active LOW
1 — reserved
0 — active LOW
1 — active HIGH
01 — 16 bits
Others — reserved
0 — active LOW
1 — active HIGH
0 — interrupt is level-triggered
1 — interrupt is edge-triggered
0 — INT1 is disabled
1 — pin INT1 is enabled
ClkNotStop
Suspend
USB single-chip host and device controller
R/W
R/W
11
0
3
1
AnalogOC
Interrupt
Polarity
Enable
Output
R/W
R/W
10
0
2
0
PinTrigger
ISP1161A1
© ST-NXP Wireless 2009. All rights reserved.
reserved
Interrupt
R/W
R/W
9
0
1
0
InterruptPin
DACKMod
Enable
R/W
R/W
64 of 140
8
e
0
0
0