ISP1161A1BD,151 STEricsson, ISP1161A1BD,151 Datasheet - Page 9

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ISP1161A1BD,151

Manufacturer Part Number
ISP1161A1BD,151
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1161A1BD,151

Lead Free Status / RoHS Status
Supplier Unconfirmed
ISP1161A1_4
Product data sheet
Table 2.
Symbol
DGND
D8
D9
D10
D11
D12
D13
DGND
D14
D15
DGND
V
n.c.
CS
RD
WR
V
DREQ1
DREQ2
DACK1
DACK2
INT1
INT2
hold1
hold2
[1]
Pin description for LQFP64
Pin
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Rev. 04 — 29 January 2009
Type
-
I/O
I/O
I/O
I/O
I/O
I/O
-
I/O
I/O
-
-
-
I
I
I
-
O
O
I
I
O
O
Description
digital ground
bit 8 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 9 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 10 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 11 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 12 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 13 of bidirectional data; slew-rate controlled; TTL input;
three-state output
digital ground
bit 14 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 15 of bidirectional data; slew-rate controlled; TTL input;
three-state output
digital ground
voltage holding pin; internally connected to the V
V
3.3 V, hence do not connect it to 5 V. When V
to 3.3 V, this pin can either be connected to 3.3 V or left
unconnected. In all cases, decouple this pin to DGND.
no connection
chip select input
read strobe input
write strobe input
voltage holding pin; internally connected to the V
V
3.3 V, hence do not connect it to 5 V. When V
to 3.3 V, this pin can either be connected to 3.3 V or left
unconnected. In all cases, decouple this pin to DGND.
HC DMA request output (programmable polarity); signals to
the DMA controller that the ISP1161A1 wants to start a DMA
transfer; see
DC DMA request output (programmable polarity); signals to
the DMA controller that the ISP1161A1 wants to start a DMA
transfer; see
HC DMA acknowledge input; when not in use, this pin must be
connected to V
DC DMA acknowledge input; when not in use, this pin must be
connected to V
HC interrupt output; programmable level, edge triggered and
polarity; see
DC interrupt output; programmable level, edge triggered and
polarity; see
hold2
hold1
…continued
pins. When V
pins. When V
USB single-chip host and device controller
Section 10.4.1
Section 13.1.4
Section 10.4.1
Section 13.1.4
CC
CC
via an external 10 k resistor
via an external 10 k resistor
CC
CC
is connected to 5 V, this pin will output
is connected to 5 V, this pin will output
ISP1161A1
© ST-NXP Wireless 2009. All rights reserved.
CC
CC
is connected
is connected
reg(3.3)
reg(3.3)
and
and
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