FDC37B787-NS Standard Microsystems (SMSC), FDC37B787-NS Datasheet - Page 96
FDC37B787-NS
Manufacturer Part Number
FDC37B787-NS
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.FDC37B787-NS.pdf
(249 pages)
Specifications of FDC37B787-NS
Pin Count
128
Lead Free Status / RoHS Status
Compliant
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ECP provides a number of advantages, some of
which are listed below. The individual features are
explained in greater detail in the remainder of this
section.
•
•
•
•
•
•
•
•
Vocabulary
The following terms are used in this document:
assert:
forward: Host to Peripheral communication.
High performance half-duplex forward and
reverse channel
Interlocked
transfer
Optional single byte RLE compression for
improved throughput (64:1)
Channel addressing for low-cost peripherals
Maintains link and data layer separation
Permits the use of active output drivers
Permits the use of adaptive signal timing
Peer-to-peer capability
When a signal asserts it transitions to a
"true" state, when a signal deasserts it
transitions to a "false" state.
handshake,
EXTENDED CAPABILITIES PARALLEL PORT
for
fast reliable
96
reverse: Peripheral to Host communication
Pword: A port word; equal in size to the width of
1
0
These terms may be considered synonymous:
•
•
•
•
•
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•
Reference Document:
Capabilities Port Protocol and ISA Interface
Standard, Rev 1.14, July 14, 1993.
document
PeriphClk, nAck
HostAck, nAutoFd
PeriphAck, Busy
nPeriphRequest, nFault
nReverseRequest, nInit
nAckReverse, PError
Xflag, Select
ECPMode, nSelectln
HostClk, nStrobe
the ISA interface. For this
implementation, PWord is always 8 bits.
A high level.
A low level.
is
available
IEEE 1284 Extended
from
Microsoft.
This
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