FDC37B787-NS Standard Microsystems (SMSC), FDC37B787-NS Datasheet - Page 242

• Manufacturer Part Number: FDC37B787-NS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37B787-NS

• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

Note 1
Note 2
NAME
PDATA<7:0>
t1
t2
t3
t4
t5
t6
t7
t8
nAUTOFD
nSTROBE
BUSY
Maximum value only applies if there is data in the FIFO waiting to be written out.
BUSY is not considered asserted or deasserted until it is stable for a minimum of 75 to 130 ns.
nAUTOFD Valid to nSTROBE Asserted
PDATA Valid to nSTROBE Asserted
BUSY Deasserted to nAUTOFD Changed
(Notes 1,2)
BUSY Deasserted to PDATA Changed (Notes 1,2)
nSTROBE Deasserted to Busy Asserted
nSTROBE Deasserted to Busy Deasserted
BUSY Deasserted to nSTROBE Asserted (Notes 1,2)
BUSY Asserted to nSTROBE Deasserted (Note 2)
TABLE 107 - ECP PARALLEL PORT FORWARD TIMING
FIGURE 28 - ECP PARALLEL PORT FORWARD TIMING
DESCRIPTION
t6
t2
t1
t7
252
t5
t8
MIN
80
80
80
80
t6
0
0
0
0
TYP
t3
t4
MAX
180
180
200
180
60
60
UNITS
ns
ns
ns
ns
ns
ns
ns
ns