FDC37B787-NS Standard Microsystems (SMSC), FDC37B787-NS Datasheet - Page 118
FDC37B787-NS
Manufacturer Part Number
FDC37B787-NS
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.FDC37B787-NS.pdf
(249 pages)
Specifications of FDC37B787-NS
Pin Count
128
Lead Free Status / RoHS Status
Compliant
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Note:
The SIRQ data frame will now support IRQ2 from
a logical device, previously IRQSER Period 3
was
Management Interrupt (nSMI).
Period 3 for IRQ2 the user should mask off the
SMI via the SMI Enable Register.
when using Period 3 for nSMI the user should
not configure any logical devices as using IRQ2.
IRQSER PERIOD
reserved
It is the responsibility of the software to ensure that two IRQ’s are not set to the same IRQ
number.
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
for
use
by
the
When using
SIGNAL SAMPLED
IRQSER Sampling Periods
Likewise,
System
nSMI/IRQ2
Not Used
IRQ10
IRQ11
IRQ12
IRQ13
IRQ14
IRQ15
IRQ1
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
IRQ8
IRQ9
120
IRQSER Period 14 is used to transfer IRQ13.
Logical devices 0 (FDC), 3 (Par Port), 4 (Ser Port
1), 5 (Ser Port 2), 6 (RTC), and 7 (KBD) shall
have IRQ13 as a choice for their primary
interrupt.
Note: When Serial IRQs are used, the RTC
IRQ, nSCI and nSMI may be output on one of
their respective pin options.
MUX Configuration Register.
# OF CLOCKS PAST START
11
14
17
20
23
26
29
32
35
38
41
44
47
2
5
8
See the IRQ
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