MT47H32M16HR-25E:F Micron Technology Inc, MT47H32M16HR-25E:F Datasheet - Page 72
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MT47H32M16HR-25E:F
Manufacturer Part Number
MT47H32M16HR-25E:F
Description
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Datasheet
1.MT47H32M16HR-25EF.pdf
(132 pages)
Specifications of MT47H32M16HR-25E:F
Organization
32Mx16
Density
512Mb
Address Bus
15b
Access Time (max)
400ps
Maximum Clock Rate
800MHz
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
0C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
295mA
Pin Count
84
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT47H32M16HR-25E:F
Manufacturer:
ON
Quantity:
700
Part Number:
MT47H32M16HR-25E:F
Manufacturer:
MICRON
Quantity:
20 000
Table 39: Truth Table – Current State Bank n – Command to Bank m
Notes: 1–6 apply to the entire table
PDF: 09005aef82f1e6e2
512MbDDR2.pdf - Rev. R 12/10 EN
Current State
Any
Idle
Row
active, active,
or precharge
Read (auto
precharge
disabled)
Write (auto pre-
charge
disabled)
Read (with
auto
precharge)
Write (with
auto
precharge)
CS#
H
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
Notes:
RAS#
X
H
X
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
1. This table applies when CKEn - 1 was HIGH and CKEn is HIGH and after
2. This table describes an alternate bank operation, except where noted (the current state
3. Current state definitions:
met (if the previous state was self refresh).
is for bank n and the commands shown are those allowed to be issued to bank m, assum-
ing that bank m is in such a state that the given command is allowable). Exceptions are
covered in the notes below.
Idle:
Row active:
Read:
Write:
CAS#
X
H
X
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
WE#
H
H
H
H
H
H
H
H
H
H
H
X
X
L
L
L
L
L
L
L
L
L
L
DESELECT (NOP/continue previous operation)
NO OPERATION (NOP/continue previous operation)
Any command otherwise allowed to bank m
ACTIVATE (select and activate row)
READ (select column and start READ burst)
WRITE (select column and start WRITE burst)
PRECHARGE
ACTIVATE (select and activate row)
READ (select column and start new READ burst)
WRITE (select column and start WRITE burst)
PRECHARGE
ACTIVATE (select and activate row)
READ (select column and start READ burst)
WRITE (select column and start new WRITE burst)
PRECHARGE
ACTIVATE (select and activate row)
READ (select column and start new READ burst)
WRITE (select column and start WRITE burst)
PRECHARGE
ACTIVATE (select and activate row)
READ (select column and start READ burst)
WRITE (select column and start new WRITE burst)
PRECHARGE
The bank has been precharged,
burst is complete.
A row in the bank has been activated and
No data bursts/accesses and no register accesses are in progress.
A READ burst has been initiated with auto precharge disabled
and has not yet terminated.
A WRITE burst has been initiated with auto precharge disabled
and has not yet terminated.
72
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Command/Action
512Mb: x4, x8, x16 DDR2 SDRAM
t
RP has been met, and any READ
© 2004 Micron Technology, Inc. All rights reserved.
t
RCD has been met.
t
XSNR has been
Commands
7, 9, 10
Notes
7, 10
7, 8
7, 8
7
7
7
7
7
7