MT48H4M16LFB4-75 IT:H Micron Technology Inc, MT48H4M16LFB4-75 IT:H Datasheet - Page 28

• Manufacturer Part Number: MT48H4M16LFB4-75 IT:H
• Manufacturer: Micron Technology Inc
• Type: SDRAMr

Specifications of MT48H4M16LFB4-75 IT:H

• Organization: 4Mx16
• Density: 64Mb
• Address Bus: 14b
• Maximum Clock Rate: 133MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 50mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Compliant

PRECHARGE
Figure 23:
Power-Down
PDF: 09005aef8237ed98/Source: 09005aef8237ed68
64mb_x16_Mobile SDRAM_Y24L_2.fm - Rev. C 10/07 EN
PRECHARGE Command
The PRECHARGE command (see Figure 23 on page 28) is used to deactivate the open
row in a particular bank or the open row in all banks. The bank(s) will be available for a
subsequent row access some specified time (
issued. Input A10 determines whether one or all banks are to be precharged, and in the
case where only one bank is to be precharged, inputs BA0, BA1 select the bank. When all
banks are to be precharged, inputs BA0, BA1 are treated as “Don’t Care.” After a bank has
been precharged, it is in the idle state and must be activated prior to any READ or WRITE
commands being issued to that bank.
Address
Power-down occurs if CKE is registered LOW coincident with a NOP or COMMAND
INHIBIT when no accesses are in progress. If power-down occurs when all banks are
idle, this mode is referred to as precharge power-down; if power-down occurs when
there is a row active in any bank, this mode is referred to as active power-down. Entering
power-down deactivates the input and output buffers, excluding CKE, for maximum
power savings while in standby. The device must not remain in the power-down state
longer than the refresh period (64ms) since no refresh operations are performed in this
mode.
The power-down state is exited by registering an NOP or COMMAND INHIBIT and CKE
HIGH at the desired clock edge (meeting
BA0, BA1
RAS#
CAS#
WE#
CKE
CLK
A10
CS#
HIGH
Valid Address
Bank Selected
All Banks
ADDRESS
BANK
28
Don’t Care
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
CKS). See Figure 24 on page 29.
64Mb: 4 Meg x 16 Mobile SDRAM
t
RP) after the PRECHARGE command is
©2006 Micron Technology, Inc. All rights reserved.
Operations