MT48LC2M32B2P-6:G Micron Technology Inc, MT48LC2M32B2P-6:G Datasheet - Page 39
![IC, SDRAM, 64MBIT, 166MHZ, TSOP-86](/photos/19/4/190475/4467798_sml.jpg)
MT48LC2M32B2P-6:G
Manufacturer Part Number
MT48LC2M32B2P-6:G
Description
IC, SDRAM, 64MBIT, 166MHZ, TSOP-86
Manufacturer
Micron Technology Inc
Type
SDRAMr
Series
-r
Specifications of MT48LC2M32B2P-6:G
Organization
2Mx32
Density
64Mb
Address Bus
13b
Access Time (max)
17/7.5/5.5ns
Maximum Clock Rate
166MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
180mA
Pin Count
86
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Memory Type
DRAM - Sychronous
Access Time
5.5ns
Page Size
64Mbit
Memory Case Style
TSOP
No. Of Pins
86
Operating Temperature Range
0°C To +70°C
Frequency
166MHz
Supply Voltage
3.3V
Format - Memory
RAM
Memory Size
64M (2Mx32)
Speed
167MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
86-TFSOP (0.400", 10.16mm Width)
Filter Terminals
SMD
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Compliant
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT48LC2M32B2P-6:G
Manufacturer:
MICRON
Quantity:
20 000
PDF: 09005aef80725c0b/Source: 09005aef806fc13c
64MSDRAM_2.fm - Rev. M 10/07 EN
10. READs or WRITEs listed in the Command (Action) column include READs or WRITEs with
11. Does not affect the state of the bank and acts as a NOP to that bank.
6. All states and sequences not shown are illegal or reserved.
7. Not bank-specific; requires that all banks are idle.
8. May or may not be bank-specific; if all banks are to be precharged, all must be in a valid
9. Not bank-specific; BURST TERMINATE affects the most recent READ or WRITE burst, regard-
state for precharging.
less of bank.
auto precharge enabled and READs or WRITEs with auto precharge disabled.
Accessing mode
Precharging all: Starts with registration of a PRECHARGE ALL command and ends when
register:
Starts with registration of a LOAD MODE REGISTER command and ends
when
banks idle state.
t
RP is met. After
t
MRD has been met. After
39
t
RP is met, all banks will be in the idle state.
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
MRD is met, the SDRAM will be in the all
64Mb: x4, x8, x16 SDRAM
©2000 Micron Technology, Inc. All rights reserved.
Commands