AD9912BCPZ Analog Devices Inc, AD9912BCPZ Datasheet - Page 36

• Manufacturer Part Number: AD9912BCPZ
• Manufacturer: Analog Devices Inc

Specifications of AD9912BCPZ

• Lead Free Status / RoHS Status: Compliant

AD9912
DOUBLER AND OUTPUT DRIVERS (REGISTER 0x0200 TO REGISTER 0x0201)
Register 0x0200—HSTL Driver
Table 32.
Bits
4
[3:2]
[1:0]
Register 0x0201—CMOS Driver
Table 33.
Bits
0
CALIBRATION (USER-ACCESSIBLE TRIM) (REGISTER 0x0400 TO REGISTER 0x0410)
Register 0x0400 to Register 0x040A—Reserved
Register 0x040B—DAC Full-Scale Current
Table 34.
Bits
[7:0]
Register 0x040C—DAC Full-Scale Current (Continued)
Table 35.
Bits
[9:8]
Register 0x040D to Register 0x0410—Reserved
HARMONIC SPUR REDUCTION (REGISTER 0x0500 TO REGISTER 0x0509)
See the Harmonic Spur Reduction section.
Register 0x0500—Spur A
Table 36.
Bits
7
6
[5:4]
[3:0]
Register 0x0501—Spur A (Continued)
Table 37.
Bits
[7:0]
Bit Name
OPOL
Reserved
HSTL output doubler
Bit Name
CMOS mux
Bit Name
DAC full-scale current
Bit Name
DAC full-scale current
Bit Name
HSR-A enable
Amplitude gain × 2
Reserved
Spur A harmonic
Bit Name
Spur A magnitude
Description
Output polarity. Setting this bit inverts the HSTL driver output polarity.
Reserved.
HSTL output doubler.
01 = doubler disabled.
10 = doubler enabled. When using doubler, Bit 5 in Register 0x0010 must also be set to 1.
Description
This bit allows the user to select whether the CMOS driver output is divided by the S-divider.
0 = S-divider input sent to CMOS driver.
1 = S-divider output sent to CMOS driver. See Figure 39.
Description
DAC full-scale current, Bits[7:0]. See the Digital-to-Analog (DAC) Output section.
Description
DAC full-scale current, Bits[9:8]. See Register 0x040B.
Description
Harmonic Spur Reduction A enable.
Setting this bit doubles the gain of the cancelling circuit and also doubles the minimum step size.
Reserved.
Spur A Harmonic 1 to Spur A Harmonic 15. Allows user to choose which harmonic to eliminate.
Description
Linear multiplier for Spur A magnitude.
Rev. D | Page 36 of 40