AD9912BCPZ Analog Devices Inc, AD9912BCPZ Datasheet - Page 29
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AD9912BCPZ
Manufacturer Part Number
AD9912BCPZ
Description
Manufacturer
Analog Devices Inc
Datasheet
1.AD9912BCPZ.pdf
(40 pages)
Specifications of AD9912BCPZ
Lead Free Status / RoHS Status
Compliant
- Current page: 29 of 40
- Download datasheet (2Mb)
Table 11. Definitions of Terms Used in Serial Control Port Timing Diagrams
Parameter
t
t
t
t
t
t
t
t
CLK
DV
DS
DH
S
H
HI
LO
SCLK
SDIO
CSB
Description
Period of SCLK
Read data valid time (time from falling edge of SCLK to valid data on SDIO/SDO)
Setup time between data and rising edge of SCLK
Hold time between data and rising edge of SCLK
Setup time between CSB and SCLK
Hold time between CSB and SCLK
Minimum period that SCLK should be in a logic high state
Minimum period that SCLK should be in a logic low state
t
t
DS
S
BIT N
t
HIGH
t
DH
Figure 56. Serial Control Port Timing—Write
t
CLK
t
LOW
Rev. D | Page 29 of 40
BIT N + 1
t
H
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