SAA7118E/V1/M5.557 NXP Semiconductors, SAA7118E/V1/M5.557 Datasheet - Page 51
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SAA7118E/V1/M5.557
Manufacturer Part Number
SAA7118E/V1/M5.557
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7118EV1M5.557.pdf
(177 pages)
Specifications of SAA7118E/V1/M5.557
Adc/dac Resolution
9b
Screening Level
Commercial
Package Type
LBGA
Pin Count
156
Lead Free Status / RoHS Status
Compliant
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NXP Semiconductors
SAA7118_7
Product data sheet
8.4.2.1 Horizontal prescaler (subaddresses A0h to A7h and D0h to D7h)
8.4.2 Horizontal scaling
The overall horizontal required scaling factor has to be split into a binary and a rational
value according to the equation:
where the parameter of prescaler XPSC[5:0] = 1 to 63 and the parameter of VPD phase
interpolation XSCY[12:0] = 300 to 8191 (0 to 299 are only theoretical values). For
example,
the arbitrary non-integer ratio is achieved via the variable phase delay VPD circuitry,
called horizontal fine scaling. The latter calculates horizontally interpolated new samples
with a 6-bit phase accuracy, which relates to less than 1 ns jitter for regular sampling
scheme. Prescaler and fine scaler create the horizontal scaler of the SAA7118.
Using the accumulation length function of the prescaler (XACL[5:0] A1h[5:0]), application
and destination dependent (e.g. scale for display or for a compression machine), a
compromise between visible bandwidth and alias suppression can be determined.
The prescaling function consists of an FIR anti-alias filter stage and an integer prescaler,
which creates an adaptive prescale dependent low-pass filter to balance sharpness and
aliasing effects.
The FIR prefilter stage implements different low-pass characteristics to reduce alias for
downscales in the range of 1 to
artefacts for CIF output formats (to be used in combination with the prescaler set to
1
The function of the prescaler is defined by:
The prescaler creates a prescale dependent FIR low-pass, with up to (64 + 7) filter taps.
The parameter XACL[5:0] can be used to vary the low-pass characteristic for a given
integer prescale of
(sharpness impression) and alias.
Equation for XPSC[5:0] calculation is:
H-scale ratio
H-scale ratio
2
•
•
•
•
scale); see
An integer prescaling ratio XPSC[5:0] A0h[5:0] (equals 1 to 63), which covers the
integer downscale range 1 to
An averaging sequence length XACL[5:0] A1h[5:0] (equals 0 to 63); range 1 to 64
A DC gain renormalization XDCG[2:0] A2h[2:0]; 1 down to
The bit XC2_1[A2h[3]], which defines the weighting of the incoming pixels during the
averaging process:
– XC2_1 = 0
– XC2_1 = 1
1
3.5
=
=
is to split in
Table
output pixel
--------------------------- -
-------------------------- -
XPSC[5:0]
input pixel
1
1
11.
XPSC[5:0]
1 + 1...+ 1 + 1
1 + 2...+ 2 + 1
Rev. 07 — 7 July 2008
1
4
---------------------------- -
XSCY[12:0]
. The user can therefore decide between signal bandwidth
1.14286. The binary factor is processed by the prescaler,
Multistandard video decoder with adaptive comb filter
1024
1
2
1
. A CIF optimized filter is built-in, which reduces
63
XPSC[5:0]
=
lower integer of
1
128
--------------------- -
Npix_out
Npix_in
SAA7118
© NXP B.V. 2008. All rights reserved.
51 of 177
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