SAA7118E/V1/M5.557 NXP Semiconductors, SAA7118E/V1/M5.557 Datasheet - Page 171
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SAA7118E/V1/M5.557
Manufacturer Part Number
SAA7118E/V1/M5.557
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7118EV1M5.557.pdf
(177 pages)
Specifications of SAA7118E/V1/M5.557
Adc/dac Resolution
9b
Screening Level
Commercial
Package Type
LBGA
Pin Count
156
Lead Free Status / RoHS Status
Compliant
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NXP Semiconductors
20. Abbreviations
SAA7118_7
Product data sheet
19.7 Issue 7: NTSC-Japan offset compensation does not work as specified
in Y/C mode
Background (how it should work):
The difference between NTSC M and NTSC-Japan is the non-existing 7.5 IRE offset in
Japan. The offset should automatically change by setting the preferred standard to
NTSC-Japan instead of NTSC M via CSTD[2:0] = 100.
Anomaly description:
The offset adaption does not work in Y/C mode (BYPS = 1), however it does work in
CVBS mode.
Impact:
The picture is too dark and picture content below +5 IRE is limited.
Workaround:
Table 153. Register setting
Table 154. Abbreviations
Line control register
LCR22
LCR23
LCR24
RAWG[7:0]
RAWO[7:0]
Acronym
AV
CIF
CMOS
CVBS
DB
DR
DVD
EAV
FIFO
FIR
1. Set decoder brightness (DBRI[7:0]) to 80h (drawback: ‘super black levels’ below
2. Set decoder to raw data mode by the LCRn registers and use RAWO[7:0] and
or
RAWG[7:0] to adapt the levels
For detail see
3 IRE are clipped)
Description
Audio Video
Common Intermediate Format
Complementary Metal-Oxide Semiconductor
Color Video Blanking Signal
Difference Blue
Difference Red
Digital Versatile Disc
End of Active Video
First In First Out
Finite Impulse Response
Table
Rev. 07 — 7 July 2008
153.
Multistandard video decoder with adaptive comb filter
Subaddress
55h
56h
57h
18h
19h
SAA7118
© NXP B.V. 2008. All rights reserved.
Value
DDh
DDh
DDh
66h
77h
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