SAA7118E/V1/M5.557 NXP Semiconductors, SAA7118E/V1/M5.557 Datasheet - Page 120

• Manufacturer Part Number: SAA7118E/V1/M5.557
• Manufacturer: NXP Semiconductors

Specifications of SAA7118E/V1/M5.557

• Adc/dac Resolution: 9b
• Screening Level: Commercial
• Package Type: LBGA
• Pin Count: 156
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
Table 66.
Table 67.
SAA7118_7
Product data sheet
Bit
D7
D6
D5
D3
D2
D1
D0
Bit
D7
D6
D5
D4
D2
D1
D0
Status byte 2 video decoder; 1Fh[7:5] and 1Fh[3:0]; read only register
Analog input control 5 (AICO5); 23h[7:4] and 23h[2:0]
10.2.28 Subaddress 1Fh
Description
status bit for interlace
detection
status bit for horizontal and
vertical loop
identification bit for detected
field frequency
Macrovision encoded color
stripe burst type 3 (4 line
version) detected
Macrovision encoded color
stripe burst detected
(any type)
copy protected source
detected according to
Macrovision version up
to 7.01
ready for capture (all internal
loops locked)
Description
analog output select
AD port output enable
ADC clock selector
clamping/reference selection
for all ADCs
enable external source switch
indicator input EXMCLR
static gain control channel 2
sign bit
static gain control channel 1
sign bit
10.3.1 Subaddress 23h
10.3 Programming register RGB/Y-P
I
control bit
INTL
HLVLN
FIDT
TYPE3
COLSTR
COPRO
RDCAP
Symbol
AOSL2
ADPE
EXCLK
REFA
EXMCE
GAI48
GAI38
2
C-bus
Rev. 07 — 7 July 2008
Multistandard video decoder with adaptive comb filter
Value
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Value
see
0
1
0
1
0
1
0
1
see
see
Table 59
Table 69
Table 68
B
-P
Function
non-interlaced
interlaced
both loops locked
unlocked
50 Hz
60 Hz
not active
active
not active
active
not active
active
not active
active
Function
AD port is set to 3-state
AD port is enabled
all ADCs are clocked by the internal generated
line-locked clock
all ADCs are clocked by the external input clock on
CLKEXT
clamping is dependent on HLNRS[03h[6]]
reference selection (input signal is pulled into ADC
range)
disabled
enabled (any slope on EXMCLR input will reset the
internal gain control loop)
R
component input processing
SAA7118
© NXP B.V. 2008. All rights reserved.
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