SAA7118E/V1/M5.557 NXP Semiconductors, SAA7118E/V1/M5.557 Datasheet - Page 34

• Manufacturer Part Number: SAA7118E/V1/M5.557
• Manufacturer: NXP Semiconductors

Specifications of SAA7118E/V1/M5.557

• Adc/dac Resolution: 9b
• Screening Level: Commercial
• Package Type: LBGA
• Pin Count: 156
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
SAA7118_7
Product data sheet
8.1.5 Power-on reset and CE input
Table 6.
A missing clock, insufficient digital or analog V
the reset sequence; all outputs are forced to 3-state (see
RES is LOW for approximately 128 LLC after the internal reset and can be applied to reset
other circuits of the digital TV system.
It is possible to force a reset by pulling the CE input to ground. After the rising edge of CE
and sufficient power supply voltage, the outputs LLC, LLC2 and SDA return from 3-state
to active, while the other signals have to be activated via programming.
Clock
XTALO
LLC
LLC2
LLC4 (internal)
LLC8 (virtual)
Fig 21. Block diagram of the clock generation circuit
LFCO
Decoder clock frequencies
BAND-PASS
FC = LLC / 4
Rev. 07 — 7 July 2008
DETECTION
CROSS
ZERO
Multistandard video decoder with adaptive comb filter
DETECTION
PHASE
Frequency (MHz)
24.576 or 32.110
27
13.5
6.75
3.375
DDA0
supply voltages (below 2.8 V) will start
DIVIDER
FILTER
Figure
LOOP
1 / 2
22). The indicator output
OSCILLATOR
SAA7118
© NXP B.V. 2008. All rights reserved.
DIVIDER
1 / 2
mhb330
34 of 177
LLC
LLC2