PIC32MX210F016B-I/SO Microchip Technology, PIC32MX210F016B-I/SO Datasheet - Page 187

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PIC32MX210F016B-I/SO

Manufacturer Part Number
PIC32MX210F016B-I/SO
Description
PIC32, 16KB Flash, 4KB RAM, 40 MHz, USB, CTMU, 4 DMA 28 SOIC .300in TUBE
Manufacturer
Microchip Technology
Datasheet
REGISTER 19-1:
© 2011-2012 Microchip Technology Inc.
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1: When using 1:1 PBCLK divisor, the user’s software should not read/write the peripheral’s SFRs in the
2: These bits have no effect when their corresponding pins are used as address lines.
Unimplemented: Read as ‘0’
CS1P: Chip Select 0 Polarity bit
1 = Active-high (PMCS1)
0 = Active-low (PMCS1)
Unimplemented: Read as ‘0’
WRSP: Write Strobe Polarity bit
For Slave Modes and Master mode 2 (PMMODE<9:8> = 00,01,10):
1 = Write strobe active-high (PMWR)
0 = Write strobe active-low (PMWR)
For Master mode 1 (PMMODE<9:8> = 11):
1 = Enable strobe active-high (PMENB)
0 = Enable strobe active-low (PMENB)
RDSP: Read Strobe Polarity bit
For Slave modes and Master mode 2 (PMMODE<9:8> = 00,01,10):
1 = Read Strobe active-high (PMRD)
0 = Read Strobe active-low (PMRD)
For Master mode 1 (PMMODE<9:8> = 11):
1 = Read/write strobe active-high (PMRD/PMWR)
0 = Read/write strobe active-low (PMRD/PMWR)
SYSCLK cycle immediately following the instruction that clears the module’s ON control bit.
PMCON: PARALLEL PORT CONTROL REGISTER (CONTINUED)
(2)
Preliminary
PIC32MX1XX/2XX
DS61168D-page 187

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