PIC32MX210F016B-I/SO Microchip Technology, PIC32MX210F016B-I/SO Datasheet - Page 182

• Manufacturer Part Number: PIC32MX210F016B-I/SO
• Description: PIC32, 16KB Flash, 4KB RAM, 40 MHz, USB, CTMU, 4 DMA 28 SOIC .300in TUBE
• Manufacturer: Microchip Technology

PIC32MX1XX/2XX
REGISTER 18-2:
DS61168D-page 182
Legend:
R = Readable bit
-n = Value at POR
bit 31-25 Unimplemented: Read as ‘0’
bit 24
bit 23-16 ADDR<7:0>: Automatic Address Mask bits
bit 15-14 UTXISEL<1:0>: TX Interrupt Mode Selection bits
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
Range
31:24
23:16
15:8
Bit
7:0
ADM_EN: Automatic Address Detect Mode Enable bit
1 = Automatic Address Detect mode is enabled
0 = Automatic Address Detect mode is disabled
When the ADM_EN bit is ‘1’, this value defines the address character to use for automatic address
detection.
11 = Reserved, do not use
10 = Interrupt is generated and asserted while the transmit buffer is empty
01 = Interrupt is generated and asserted when all characters have been transmitted
00 = Interrupt is generated and asserted while the transmit buffer contains at least one empty space
UTXINV: Transmit Polarity Inversion bit
If IrDA mode is disabled (i.e., IREN (UxMODE<12>) is ‘0’):
1 = UxTX Idle state is ‘0’
0 = UxTX Idle state is ‘1’
If IrDA mode is enabled (i.e., IREN (UxMODE<12>) is ‘1’):
1 = IrDA encoded UxTX Idle state is ‘1’
0 = IrDA encoded UxTX Idle state is ‘0’
URXEN: Receiver Enable bit
1 = UARTx receiver is enabled. UxRX pin is controlled by UARTx (if ON = 1)
0 = UARTx receiver is disabled. UxRX pin is ignored by the UARTx module. UxRX pin is controlled by port.
UTXBRK: Transmit Break bit
1 = Send Break on next transmission. Start bit followed by twelve ‘0’ bits, followed by Stop bit; cleared by
0 = Break transmission is disabled or completed
UTXEN: Transmit Enable bit
1 = UARTx transmitter is enabled. UxTX pin is controlled by UARTx (if ON = 1)
0 = UARTx transmitter is disabled. Any pending transmission is aborted and buffer is reset. UxTX pin is con-
UTXBF: Transmit Buffer Full Status bit (read-only)
1 = Transmit buffer is full
0 = Transmit buffer is not full, at least one more character can be written
TRMT: Transmit Shift Register is Empty bit (read-only)
1 = Transmit shift register is empty and transmit buffer is empty (the last transmission has completed)
0 = Transmit shift register is not empty, a transmission is in progress or queued in the transmit buffer
31/23/15/7
R/W-0
R/W-0
R/W-0
hardware upon completion
trolled by port.
Bit
U-0
—
UTXISEL<1:0>
URXISEL<1:0>
UxSTA: UARTx STATUS AND CONTROL REGISTER
30/22/14/6
R/W-0
R/W-0
R/W-0
Bit
U-0
—
W = Writable bit
‘1’ = Bit is set
29/21/13/5
UTXINV
ADDEN
R/W-0
R/W-0
R/W-0
Bit
U-0
—
Preliminary
28/20/12/4
URXEN
RIDLE
R/W-0
R/W-0
Bit
U-0
R-1
—
ADDR<7:0>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
27/19/11/3
UTXBRK
PERR
R/W-0
R/W-0
Bit
U-0
R-0
—
26/18/10/2
UTXEN
FERR
© 2011-2012 Microchip Technology Inc.
R/W-0
R/W-0
Bit
U-0
R-0
—
x = Bit is unknown
25/17/9/1
UTXBF
OERR
R/W-0
R/W-0
Bit
U-0
R-0
—
24/16/8/0
ADM_EN
URXDA
TRMT
R/W-0
R/W-0
Bit
R-1
R-0