PIC18LF13K22-E/ML Microchip Technology, PIC18LF13K22-E/ML Datasheet - Page 90
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PIC18LF13K22-E/ML
Manufacturer Part Number
PIC18LF13K22-E/ML
Description
8KB Flash, 256bytes RAM, 256bytes EEPROM, 16MIPS, NanoWatt XLP 20 QFN 4x4mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF13K22-ISS.pdf
(388 pages)
2.PIC18LF13K22-ISS.pdf
(12 pages)
3.PIC18LF13K22-ISS.pdf
(36 pages)
Specifications of PIC18LF13K22-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
32 KHz
Number Of Programmable I/os
18
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
A/d Bit Size
10 bit
A/d Channels Available
12
Height
0.88 mm
Length
4 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.8 V, 2.7 V
Width
4 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC18F1XK22/LF1XK22
8.3
PORTC is an 8-bit wide, bidirectional port. The corre-
sponding data direction register is TRISC. Setting a
TRISC bit (= 1) will make the corresponding PORTC
pin an input (i.e., disable the output driver). Clearing a
TRISC bit (= 0) will make the corresponding PORTC
pin an output (i.e., enable the output driver and put the
contents of the output latch on the selected pin).
The PORTC Data Latch register (LATC) is also
memory mapped. Read-modify-write operations on the
LATC register read and write the latched output value
for PORTC.
REGISTER 8-11:
REGISTER 8-12:
DS41365D-page 90
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
TRISC7
R/W-1
R/W-x
RC7
PORTC, TRISC and LATC
Registers
RC<7:0>: PORTC I/O Pin bits
1 = Port pin is > V
0 = Port pin is < V
TRISC<7:0>: PORTC Tri-State Control bits
1 = PORTC pin configured as an input (tri-stated)
0 = PORTC pin configured as an output
TRISC6
R/W-x
R/W-1
RC6
PORTC: PORTC REGISTER
TRISC: PORTC TRI-STATE REGISTER
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
TRISC5
R/W-x
IH
IL
R/W-1
RC5
TRISC4
R/W-1
R/W-x
RC4
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
TRISC3
R/W-x
R/W-1
All the pins on PORTC are implemented with Schmitt
Trigger input buffer. Each pin is individually configu-
rable as an input or output.
EXAMPLE 8-3:
RC3
CLRF
CLRF
MOVLW
MOVWF
Note:
PORTC
LATC
0CFh
TRISC
On a Power-on Reset, RC<7:6> and
RC<3:0> are configured as analog inputs
and read as ‘0’.
TRISC2
R/W-1
R/W-x
RC2
; Initialize PORTC by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RC<3:0> as inputs
; RC<5:4> as outputs
; RC<7:6> as inputs
INITIALIZING PORTC
2010 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
TRISC1
R/W-x
R/W-1
RC1
TRISC0
R/W-1
R/W-x
RC0
bit 0
bit 0
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