PIC18F96J65-I/PF Microchip Technology, PIC18F96J65-I/PF Datasheet - Page 86
![96KB Flash, 12KB RAM, 10BASE-T Ethernet 100 TQFP 14x14x1mm TRAY](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
PIC18F96J65-I/PF
Manufacturer Part Number
PIC18F96J65-I/PF
Description
96KB Flash, 12KB RAM, 10BASE-T Ethernet 100 TQFP 14x14x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F66J65-IPT.pdf
(8 pages)
3.PIC18F66J65-IPT.pdf
(480 pages)
4.PIC18F66J65-IPT.pdf
(4 pages)
5.PIC18F66J65-IPT.pdf
(10 pages)
6.PIC18F96J60-IPT.pdf
(24 pages)
Specifications of PIC18F96J65-I/PF
Core Processor
PIC
Core Size
8-Bit
Speed
41.667MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
96KB (48K x 16)
Program Memory Type
FLASH
Ram Size
3808 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3808 B
Interface Type
Display Driver, Ethernet, EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
41.667 MHz
Number Of Programmable I/os
70
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183033, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162064 - HEADER INTFC MPLABICD2 64/80/100
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F96J65-I/PF
Manufacturer:
Microchip
Quantity:
251
Company:
Part Number:
PIC18F96J65-I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F66J65-IPT PDF datasheet #2
- PIC18F66J65-IPT PDF datasheet #3
- PIC18F66J65-IPT PDF datasheet #4
- PIC18F66J65-IPT PDF datasheet #5
- PIC18F96J60-IPT PDF datasheet #6
- Current page: 86 of 480
- Download datasheet (8Mb)
PIC18F97J60 FAMILY
TABLE 5-5:
DS39762E-page 86
STATUS
TMR0H
TMR0L
T0CON
OSCCON
ECON1
WDTCON
RCON
TMR1H
TMR1L
T1CON
TMR2
PR2
T2CON
SSP1BUF
SSP1ADD
SSP1STAT
SSP1CON1
SSP1CON2
ADRESH
ADRESL
ADCON0
ADCON1
ADCON2
CCPR1H
CCPR1L
CCP1CON
CCPR2H
CCPR2L
CCP2CON
CCPR3H
CCPR3L
CCP3CON
ECCP1AS
CVRCON
CMCON
TMR3H
TMR3L
Legend: x = unknown, u = unchanged, - = unimplemented, read as ‘0’, q = value depends on condition, r = reserved bit, do not modify. Shaded cells
Note 1:
File Name
2:
3:
4:
5:
6:
7:
8:
9:
are unimplemented, read as ‘0’.
Bit 7 and bit 6 are cleared by user software or by a POR.
Bit 21 of the PC is only available in Serial Programming modes.
Reset value is ‘0’ when Two-Speed Start-up is enabled and ‘1’ if disabled.
Alternate names and definitions for these bits when the MSSP module is operating in I
These bits and/or registers are only available in 100-pin devices; otherwise, they are unimplemented and read as ‘0’. Reset values shown
apply only to 100-pin devices.
These bits and/or registers are only available in 80-pin and 100-pin devices; in 64-pin devices, they are unimplemented and read as ‘0’. Reset
values are shown for 100-pin devices.
In Microcontroller mode, the bits in this register are unwritable and read as ‘0’.
PLLEN is only available when either ECPLL or HSPLL Oscillator mode is selected; otherwise, read as ‘0’.
Implemented in 100-pin devices in Microcontroller mode only.
Timer0 Register High Byte
Timer0 Register Low Byte
Timer1 Register High Byte
Timer1 Register Low Byte
Timer2 Register
Timer2 Period Register
MSSP1 Receive Buffer/Transmit Register
MSSP1 Address Register (I
A/D Result Register High Byte
A/D Result Register Low Byte
Capture/Compare/PWM Register 1 High Byte
Capture/Compare/PWM Register 1 Low Byte
Capture/Compare/PWM Register 2 High Byte
Capture/Compare/PWM Register 2 Low Byte
Capture/Compare/PWM Register 3 High Byte
Capture/Compare/PWM Register 3 Low Byte
ECCP1ASE ECCP1AS2 ECCP1AS1 ECCP1AS0
Timer3 Register High Byte
Timer3 Register Low Byte
TMR0ON
CVREN
TXRST
ADCAL
C2OUT
IDLEN
WCOL
GCEN
GCEN
ADFM
RD16
P1M1
P2M1
P3M1
IPEN
Bit 7
SMP
—
—
—
—
REGISTER FILE SUMMARY (PIC18F97J60 FAMILY) (CONTINUED)
T2OUTPS3
ACKSTAT
ACKSTAT
CVROE
RXRST
T1RUN
SSPOV
C1OUT
T08BIT
P1M0
P2M0
P3M0
Bit 6
CKE
—
—
—
—
—
—
—
2
T2OUTPS2
ADMSK5
T1CKPS1
C™ Slave mode), MSSP1 Baud Rate Reload Register (I
DMAST
SSPEN
ACKDT
VCFG1
ACQT2
DC1B1
DC2B1
DC3B1
CVRR
C2INV
CHS3
T0CS
Bit 5
D/A
CM
—
—
—
(4)
T2OUTPS1
ADMSK4
T1CKPS0
CSUMEN
ACKEN
CVRSS
VCFG0
ACQT1
DC1B0
DC2B0
DC3B0
C1INV
CHS2
T0SE
Bit 4
CKP
—
—
RI
N
P
(4)
T2OUTPS0
ADMSK3
T1OSCEN
PSS1AC1
CCP1M3
CCP2M3
CCP3M3
OSTS
SSPM3
PCFG3
TXRTS
ACQT0
RCEN
CHS1
CVR3
Bit 3
PSA
CIS
OV
TO
—
S
(3)
(4)
ADMSK2
PSS1AC0
TMR2ON
CCP1M2
CCP2M2
CCP3M2
T1SYNC
SSPM2
PCFG2
ADCS2
T0PS2
RXEN
CHS0
CVR2
Bit 2
PEN
CM2
R/W
PD
—
—
Z
(4)
2
C™ Slave mode.
ADMSK1
GO/DONE
T2CKPS1
2
PSS1BD1
TMR1CS
CCP1M1
CCP2M1
CCP3M1
C Master mode)
SSPM1
PCFG1
ADCS1
T0PS1
RSEN
CVR1
SCS1
Bit 1
POR
CM1
DC
UA
—
—
(4)
© 2009 Microchip Technology Inc.
T2CKPS0
PSS1BD0
SWDTEN
TMR1ON
CCP1M0
CCP2M0
CCP3M0
SSPM0
PCFG0
ADCS0
T0PS0
ADON
CVR0
SCS0
Bit 0
BOR
SEN
SEN
CM0
BF
—
C
---x xxxx
0000 0000
xxxx xxxx
1111 1111
0--- q-00
0000 00--
0-q1 1100 64, 58, 137
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
1111 1111
-000 0000
xxxx xxxx
0000 0000
0000 0000
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
0-00 0000
--00 0000
0-00 0000
xxxx xxxx
xxxx xxxx
0000 0000
xxxx xxxx
xxxx xxxx
0000 0000
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
0000 0000
0000 0111
xxxx xxxx
xxxx xxxx
POR, BOR
--- ---0
Values on
Details on
64, 260,
64, 261,
64, 167
64, 167
64, 167
64, 217
64, 357
64, 171
64, 171
64, 171
64, 177
64, 177
64, 177
64, 269
64, 269
64, 272
64, 337
64, 337
64, 329
64, 330
64, 331
64, 189
64, 189
64, 193
64, 189
64, 189
64, 193
64, 189
64, 189
64, 193
64, 205
64, 345
64, 339
64, 179
64, 179
64, 91
64, 47
Page:
270
271
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