PIC18F96J65-I/PF Microchip Technology, PIC18F96J65-I/PF Datasheet - Page 208
![96KB Flash, 12KB RAM, 10BASE-T Ethernet 100 TQFP 14x14x1mm TRAY](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
PIC18F96J65-I/PF
Manufacturer Part Number
PIC18F96J65-I/PF
Description
96KB Flash, 12KB RAM, 10BASE-T Ethernet 100 TQFP 14x14x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F66J65-IPT.pdf
(8 pages)
3.PIC18F66J65-IPT.pdf
(480 pages)
4.PIC18F66J65-IPT.pdf
(4 pages)
5.PIC18F66J65-IPT.pdf
(10 pages)
6.PIC18F96J60-IPT.pdf
(24 pages)
Specifications of PIC18F96J65-I/PF
Core Processor
PIC
Core Size
8-Bit
Speed
41.667MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
96KB (48K x 16)
Program Memory Type
FLASH
Ram Size
3808 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3808 B
Interface Type
Display Driver, Ethernet, EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
41.667 MHz
Number Of Programmable I/os
70
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183033, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162064 - HEADER INTFC MPLABICD2 64/80/100
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F96J65-I/PF
Manufacturer:
Microchip
Quantity:
251
Company:
Part Number:
PIC18F96J65-I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F66J65-IPT PDF datasheet #2
- PIC18F66J65-IPT PDF datasheet #3
- PIC18F66J65-IPT PDF datasheet #4
- PIC18F66J65-IPT PDF datasheet #5
- PIC18F96J60-IPT PDF datasheet #6
- Current page: 208 of 480
- Download datasheet (8Mb)
PIC18F97J60 FAMILY
TABLE 17-5:
DS39762E-page 208
INTCON
RCON
PIR1
PIE1
IPR1
PIR2
PIE2
IPR2
PIR3
PIE3
IPR3
TRISB
TRISC
TRISD
TRISE
TRISG
TRISH
TMR1L
TMR1H
T1CON
TMR2
T2CON
PR2
TMR3L
TMR3H
T3CON
TMR4
T4CON
PR4
CCPRxL
CCPRxH
CCPxCON
ECCPxAS
ECCPxDEL
Legend:
Note 1:
Name
(1)
(2)
2:
3:
(3)
(3)
(3)
(3)
(3)
— = unimplemented, read as ‘0’, r = reserved. Shaded cells are not used during ECCPx operation.
Applicable to 64-pin devices only.
Registers and/or specific bits are unimplemented on 64-pin devices.
Generic term for all of the identical registers of this name for all Enhanced CCPx modules, where ‘x’ identifies the individual
module (ECCP1, ECCP2 or ECCP3). Bit assignments and Reset values for all registers of the same generic name are
identical.
Timer1 Register Low Byte
Timer1 Register High Byte
Timer2 Register
Timer2 Period Register
Timer3 Register Low Byte
Timer3 Register High Byte
Timer4 Register
Timer4 Period Register
Capture/Compare/PWM Register x Low Byte
Capture/Compare/PWM Register x High Byte
ECCP
TRISE7
GIE/GIEH
PxRSEN
OSCFIE
OSCFIP
OSCFIF
TRISC7
TRISD7
TRISG7
TRISH7
SSP2IF
SSP2IE
SSP2IP
TRISB7
PSPIE
PSPIP
PSPIF
RD16
RD16
PxM1
IPEN
Bit 7
REGISTERS ASSOCIATED WITH ECCPx MODULES AND TIMER1 TO TIMER4
—
—
X
ASE ECCP
(2)
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0
T4OUTPS3 T4OUTPS2 T4OUTPS1 T4OUTPS0
PEIE/GIEL
TRISE6
T3CCP2
TRISC6
TRISD6
TRISG6
TRISH6
BCL2IE
BCL2IP
TRISB6
BCL2IF
T1RUN
PxDC6
CMIE
CMIP
PxM0
ADIE
ADIP
CMIF
ADIF
Bit 6
—
X
AS2 ECCP
(2)
T1CKPS1
T3CKPS1
TMR0IE
TRISC5
TRISD5
TRISG5
TRISH5
TRISB5
TRISE5
DCxB1
PxDC5
RC1IE
RC1IP
ETHIE
ETHIP
RC2IE
RC2IP
RC1IF
ETHIF
RC2IF
Bit 5
CM
X
AS1 ECCP
T1CKPS0
T3CKPS0
TRISG4
TRISB4
TRISC4
TRISD4
TRISE4
TRISH4
DCxB0
PxDC4
INT0IE
TX1IF
TX1IE
TX1IP
TX2IF
TX2IE
TX2IP
Bit 4
RI
r
r
r
X
AS0
T1OSCEN
TRISG3
PSS
CCPxM3
T3CCP1
TMR4IF
TMR4IE
TMR4IP
TRISC3
TRISD3
TRISH3
SSP1IF
SSP1IE
SSP1IP
BCL1IF
BCL1IE
BCL1IP
TRISB3
TRISE3
PxDC3
RBIE
Bit 3
TO
X
AC1
(2)
PSS
TMR2ON
TMR4ON
CCPxM2
T1SYNC
T3SYNC
TMR0IF
CCP1IF
CCP1IE
CCP1IP
CCP5IF
CCP5IE
CCP5IP
TRISC2
TRISD2
TRISG2
TRISH2
TRISB2
TRISE2
PxDC2
Bit 2
PD
—
—
—
X
AC0
T2CKPS1
T4CKPS1
PSS
TMR1CS
TMR3CS
CCPxM1
© 2009 Microchip Technology Inc.
TMR2IE
TMR2IP
TMR3IE
TMR3IP
TMR2IF
TMR3IF
CCP4IF
CCP4IE
CCP4IP
TRISB1
TRISC1
TRISD1
TRISE1
TRISG1
TRISH1
INT0IF
PxDC1
Bit 1
POR
X
BD1
TRISG0
T2CKPS0
T4CKPS0
PSS
TMR1ON
TMR3ON
CCPxM0
TMR1IF
TMR1IE
TMR1IP
CCP2IF
CCP2IE
CCP2IP
CCP3IF
CCP3IE
CCP3IP
TRISC0
TRISD0
TRISH0
TRISB0
TRISE0
PxDC0
RBIF
Bit 0
BOR
X
BD0
(2)
on Page:
Values
Reset
64, 67
63
64
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
64
64
64
64
64
64
64
64
65
66
66
66
64
64
64
67
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