PIC18F96J65-I/PF Microchip Technology, PIC18F96J65-I/PF Datasheet - Page 193
![96KB Flash, 12KB RAM, 10BASE-T Ethernet 100 TQFP 14x14x1mm TRAY](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
PIC18F96J65-I/PF
Manufacturer Part Number
PIC18F96J65-I/PF
Description
96KB Flash, 12KB RAM, 10BASE-T Ethernet 100 TQFP 14x14x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F66J65-IPT.pdf
(8 pages)
3.PIC18F66J65-IPT.pdf
(480 pages)
4.PIC18F66J65-IPT.pdf
(4 pages)
5.PIC18F66J65-IPT.pdf
(10 pages)
6.PIC18F96J60-IPT.pdf
(24 pages)
Specifications of PIC18F96J65-I/PF
Core Processor
PIC
Core Size
8-Bit
Speed
41.667MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
96KB (48K x 16)
Program Memory Type
FLASH
Ram Size
3808 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3808 B
Interface Type
Display Driver, Ethernet, EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
41.667 MHz
Number Of Programmable I/os
70
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183033, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162064 - HEADER INTFC MPLABICD2 64/80/100
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F96J65-I/PF
Manufacturer:
Microchip
Quantity:
251
Company:
Part Number:
PIC18F96J65-I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F66J65-IPT PDF datasheet #2
- PIC18F66J65-IPT PDF datasheet #3
- PIC18F66J65-IPT PDF datasheet #4
- PIC18F66J65-IPT PDF datasheet #5
- PIC18F96J60-IPT PDF datasheet #6
- Current page: 193 of 480
- Download datasheet (8Mb)
17.0
In the PIC18F97J60 family of devices, three of the CCP
modules are implemented as standard CCP modules
with Enhanced PWM capabilities. These include the
provision for 2 or 4 output channels, user-selectable
polarity, dead-band control and automatic shutdown
and restart. The Enhanced features are discussed in
detail in Section 17.4 “Enhanced PWM Mode”.
Capture, Compare and single-output PWM functions of
the ECCPx modules are the same as described for the
standard CCPx modules.
REGISTER 17-1:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-4
bit 3-0
Note 1:
R/W-0
PxM1
ENHANCED CAPTURE/
COMPARE/PWM (ECCP)
MODULES
Implemented only for ECCP1 and ECCP2; same as ‘1010’ for ECCP3.
PxM1:PxM0: Enhanced PWM Output Configuration bits
If CCPxM3:CCPxM2 = 00, 01, 10:
xx = PxA assigned as Capture/Compare input/output; PxB, PxC, PxD assigned as port pins
If CCPxM3:CCPxM2 = 11:
00 = Single output: PxA modulated; PxB, PxC, PxD assigned as port pins
01 = Full-bridge output forward: P1D modulated; P1A active; P1B, P1C inactive
10 = Half-bridge output: P1A, P1B modulated with dead-band control; P1C, P1D assigned as port pins
11 = Full-bridge output reverse: P1B modulated; P1C active; P1A, P1D inactive
DCxB1:DCxB0: ECCPx Module PWM Duty Cycle bit 1 and bit 0
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the 2 LSbs of the 10-bit PWM duty cycle. The 8 MSbs of the duty cycle are found in CCPRxL.
CCPxM3:CCPxM0: ECCPx Module Mode Select bits
0000 = Capture/Compare/PWM disabled (resets ECCPx module)
0001 = Reserved
0010 = Compare mode; toggle output on match
0011 = Capture mode
0100 = Capture mode; every falling edge
0101 = Capture mode; every rising edge
0110 = Capture mode; every 4th rising edge
0111 = Capture mode; every 16th rising edge
1000 = Compare mode; initialize ECCPx pin low; set output on compare match (set CCPxIF)
1001 = Compare mode; initialize ECCPx pin high; clear output on compare match (set CCPxIF)
1010 = Compare mode; generate software interrupt only, ECCPx pin reverts to I/O state)
1011 = Compare mode; trigger special event (ECCPx resets TMR1 or TMR3, sets CCPxIF bit,
1100 = PWM mode; PxA, PxC active-high; PxB, PxD active-high
1101 = PWM mode; PxA, PxC active-high; PxB, PxD active-low
1110 = PWM mode; PxA, PxC active-low; PxB, PxD active-high
1111 = PWM mode; PxA, PxC active-low; PxB, PxD active-low
R/W-0
PxM0
CCPxCON: ENHANCED CCPx CONTROL REGISTER (ECCP1/ECCP2/ECCP3)
ECCPx trigger also starts A/D conversion if A/D module is enabled)
W = Writable bit
‘1’ = Bit is set
DCxB1
R/W-0
DCxB0
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CCPxM3
PIC18F97J60 FAMILY
R/W-0
The control register for the Enhanced CCPx module is
shown in Register 17-1. It differs from the CCP4CON/
CCP5CON registers in that the two Most Significant
bits are implemented to control PWM functionality.
In addition to the expanded range of modes available
through the Enhanced CCPxCON register, the ECCPx
modules each have two additional registers associated
with Enhanced PWM operation and auto-shutdown
features. They are:
• ECCPxDEL (Dead-Band Delay)
• ECCPxAS (Auto-Shutdown Configuration)
CCPxM2
R/W-0
x = Bit is unknown
CCPxM1
(1)
R/W-0
DS39762E-page 193
CCPxM0
R/W-0
bit 0
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