PIC18F14K22-E/ML Microchip Technology, PIC18F14K22-E/ML Datasheet - Page 82

16KB Flash, 512bytes RAM, 256bytes EEPROM, 16MIPS, 1.8-5.5V Operation 20 QFN 4x4

PIC18F14K22-E/ML

Manufacturer Part Number
PIC18F14K22-E/ML
Description
16KB Flash, 512bytes RAM, 256bytes EEPROM, 16MIPS, 1.8-5.5V Operation 20 QFN 4x4
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18F14K22-E/ML

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F14K22-E/ML
Manufacturer:
MICROCHIP
Quantity:
1 000
PIC18F1XK22/LF1XK22
REGISTER 8-3:
REGISTER 8-4:
REGISTER 8-5:
DS41365D-page 82
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-4
bit 3
bit 2-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-0
U-0
U-0
U-0
Unimplemented: Read as ‘0’
LATA<5:4>: RA<5:4> Port I/O Output Latch Register bits
Unimplemented: Read as ‘0’
LATA<2:0>: RA<2:0> Port I/O Output Latch Register bits
Unimplemented: Read as ‘0’
WPUA<5:0>: Weak Pull-up Enable bit
1 = Pull-up enabled
0 = Pull-up disabled
Unimplemented: Read as ‘0’
IOCA<5:0>: PORTA I/O Pin bit
1 = Interrupt-on-change enabled
0 = Interrupt-on-change disabled
U-0
U-0
U-0
LATA: PORTA DATA LATCH REGISTER
WPUA: WEAK PULL-UP PORTA REGISTER
IOCA: INTERRUPT-ON-CHANGE PORTA REGISTER
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
WPUA5
LATA5
IOCA5
R/W-x
R/W-1
R/W-0
WPUA4
IOCA4
LATA4
R/W-x
R/W-1
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
WPUA3
IOCA3
R/W-1
R/W-0
U-0
WPUA2
IOCA2
LATA2
R/W-x
R/W-1
R/W-0
 2010 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
x = Bit is unknown
WPUA1
IOCA1
LATA1
R/W-1
R/W-0
R/W-x
WPUA0
IOCA0
LATA0
R/W-x
R/W-1
R/W-0
bit 0
bit 0
bit 0

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