PIC18F14K22-E/ML Microchip Technology, PIC18F14K22-E/ML Datasheet - Page 163

16KB Flash, 512bytes RAM, 256bytes EEPROM, 16MIPS, 1.8-5.5V Operation 20 QFN 4x4

PIC18F14K22-E/ML

Manufacturer Part Number
PIC18F14K22-E/ML
Description
16KB Flash, 512bytes RAM, 256bytes EEPROM, 16MIPS, 1.8-5.5V Operation 20 QFN 4x4
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18F14K22-E/ML

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F14K22-E/ML
Manufacturer:
MICROCHIP
Quantity:
1 000
14.3.7
In I
reload value is placed in the SSPADD register
(Figure 14-17). When a write occurs to SSPBUF, the
Baud Rate Generator will automatically begin counting.
Once
transmission of the last data bit is followed by ACK), the
internal clock will automatically stop counting and the
SCL pin will remain in its last state.
FIGURE 14-17:
TABLE 14-3:
 2010 Microchip Technology Inc.
Note 1:
2
C Master mode, the Baud Rate Generator (BRG)
the
48 MHz
48 MHz
48 MHz
40 MHz
40 MHz
40 MHz
16 MHz
16 MHz
16 MHz
4 MHz
4 MHz
4 MHz
The I
100 kHz) in all details, but may be used with care where higher rates are required by the application.
BAUD RATE
F
OSC
given
2
C interface does not conform to the 400 kHz I
I
2
C™ CLOCK RATE W/BRG
operation
BAUD RATE GENERATOR BLOCK DIAGRAM
SSPM<3:0>
SCL
is
complete
12 MHz
12 MHz
12 MHz
10 MHz
10 MHz
10 MHz
SSPM<3:0>
4 MHz
4 MHz
4 MHz
1 MHz
1 MHz
1 MHz
F
CY
Reload
Control
(i.e.,
CLKOUT
Preliminary
PIC18F1XK22/LF1XK22
Reload
Table 14-3 demonstrates clock rates based on
instruction cycles and the BRG value loaded into
SSPADD.
EQUATION 14-1:
2
BRG Down Counter
C specification (which applies to rates greater than
SSPADD<7:0>
BRG Value
0Ch
0Bh
1Fh
1Dh
18h
63h
09h
27h
02h
09h
00h
77h
F
SCL
=
----------------------------------------------
SSPADD
F
OSC
(2 Rollovers of BRG)
/2
F
OSC
+
400 kHz
400 kHz
333 kHz
312.5 kHz
DS41365D-page 163
1 MHz
1 MHz
400 kHz
100 kHz
100 kHz
308 kHz
100 kHz
100 kHz
1
F
 4  
SCL
(1)
(1)
(1)
(1)
(1)

Related parts for PIC18F14K22-E/ML