MICRF505YML TR Micrel Inc, MICRF505YML TR Datasheet
MICRF505YML TR
Specifications of MICRF505YML TR
MICRF505YMLTR
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MICRF505YML TR Summary of contents
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General Description The MICRF505 is a true single-chip, frequency shift keying (FSK) transceiver intended for use in half- duplex, bidirectional RF links. The multi-channeled FSK transceiver is intended equipment in compliance with the North American Federal Communications Commission (FCC) part ...
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General Description ................................................................................................................................................... 1 Features ..................................................................................................................................................................... 1 Applications ................................................................................................................................................................ 1 RadioWire® RF Selection Guide ............................................................................................................................... 4 Ordering Information .................................................................................................................................................. 4 Block Diagram ............................................................................................................................................................ 4 Pin Configuration........................................................................................................................................................ 5 Pin Description ........................................................................................................................................................... 5 (1) Absolute Maximum Ratings .................................................................................................................................... 6 (2) Operating Ratings ...
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MICRF505BML/YML Land pattern........................................................................................................................... 31 Layout Considerations ............................................................................................................................................. 32 Package Information MICRF505BML ...................................................................................................................... 33 Package Information MICRF505YML ...................................................................................................................... 34 Overview of programming bit ................................................................................................................................... 35 Table 1: Detailed description of programming bit .................................................................................................... 35 Table 2: Main Mode bit............................................................................................................................................. 40 Table ...
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... Frequency Range MICRF500 700MHz – 1.1GHz MICRF501 300MHz – 440MHz MICRF505 850MHz – 950MHz MICRF506 410MHz – 450MHz MICRF405 290-980MHz Ordering Information Part Number MICRF505YML TR MICRF505BML TR ____________________________________________________________________________________________________ Block Diagram ANT LC Filter CIBIAS PTATBIAS October 2006 Maximum Supply Receive Data Rate Voltage ...
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Pin Configuration Pin Description Pin Name Type Pin Number 1 RFGND 2 PTATBIAS O 3 RFVDD 4 RFGND 5 ANT I/O 6 RFGND 7 RFGND CIBIAS O 10 IFVDD 11 IFGND 12 ICHOUT O 13 QCHOUT O ...
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Absolute Maximum Ratings Supply Voltage (V )......................................... +2.7V DD Voltage on any pin (GND = 0V)...... -0.3V to 2.7V Storage Temperature (T ) ................ -55°C to +150°C s (3) ESD Rating ........................................................ 2kV Electrical Characteristics f = 915MHz. Data-rate = ...
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Symbol Parameter (5) Occupied bandwidth Spurious Emission < 1GHz Spurious Emission > 1GHz nd 2 Harmonic rd 3 Harmonic Spurious Emission <902MHz Spurious Emission >928MHz Receive Section Rx Current Consumption Rx Current Consumption Variation Receiver Sensitivity Receiver Maximum Input Power ...
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Symbol Parameter (5) Spurious Emission (5) Input Impedance RSSI Dynamic Range RSSI Output Range Digital Inputs/ Output s V Logic Input High IH V Logic Input Low IL (5) Clock/Data Frequency Notes: 1. Exceeding the absolute maximum rating may damage ...
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Programming General The MICRF505 functions are enabled through a number of programming bits. The programming bits are organized as a set of addressable control registers, each register holding 8 bits. There are 23 control registers in total in the MICRF505, ...
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Writing to the control registers in MICRF505 Writing: A number of octets are entered into MICRF505 followed by a load-signal to activate the new setting. Making these events is referred “write sequence.” possible to update ...
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Writing to All Registers After a power-on, all writable registers should be written. This is described here. Writing to all register can be done at any time. To get the simplest firmware, always write to all registers. The price to ...
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Micrel Writing to n Registers having Non-Incremental Addresses Registers with non-incremental addresses can be written to in one write-sequence as well. Example of non-incremental addresses: “0,1,3”. However, this requires more overhead, and the user should consider the possibility to make ...
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Symbol Parameter Min. Tper Min. period of 50 SCLK Thigh Min. high time of 20 SCLK Tlow Min. low time of 20 SCLK tfall Max. time of falling edge of SCLK trise Max. time of rising edge of SCLK Tcsr ...
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Programming summary • Use CS, SCLK, and IO to get access to the control registers in MICRF505. • SCLK is user-controlled. • Write to the MICRF505 at positive edges (MICRF505 reads at negative edges). • Read from the MICRF505 at ...
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Frequency Synthesizer The MICRF505 frequency synthesizer consists of a voltage-controlled oscillator oscillator, dual modulus prescaler, programmable frequency dividers and a phase-detector. The loop- filter is external for flexibility and can be a simple passive circuit. The phase detector compares frequencies ...
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The lengths of the N, M, and A registers are 12, 12 and 6 respectively The values can be calculated from the following formula XCO VCO = = f ( PhD M 16 × ...
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XCOtune Start-up Time (µ Table 7. Typical values with external reference is used instead of a crystal, the signal shall be applied to pin 24, XTALOUT. Due to internal DC ...
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Charge Pump A6.. 0000010 CP_HI SC_by ‘0’ PA_by OUTS3 The charge pump current can be set to either 125µA or 500µA by CP_HI (‘1’ → 500µA). This will affect the loop filter component values, see ...
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Transceiver Sync/Non-Synchronous Mode A6.. 0000000 LNA_by PA2 0000110 - Mod_clkS2 0000111 BitRate_clkS1 BitRate_clkS0 When Sync_en = 1, it will enable the bit synchronizer in receive mode. The bit synchronizer clock needs to be programmed, see chapter Bit synchronizer. ...
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Receiver The receiver is a zero intermediate frequency (IF) type in order to make channel filtering possible with low-power integrated low-pass filters. The receiver consists of a low noise amplifier (LNA) that drives a quadrature mixer pair. The mixer outputs ...
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Switched Capacitor Filter A6.. 0001000 ‘1’ ‘1’ ScClk5 ScClk4 ScClk3 The main channel filter is a switched-capacitor implementation of a six-pole elliptic low pass filter. The elliptic filter minimized the total capacitance required for a ...
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FEE A6.. 0010101 - - - - 0010110 FEE_7 FEE_6 FEE_5 FEE_4 The Frequency Error Estimator information from the demodulator to calculate the frequency offset between it’s receive frequency and the transmitter frequency. The output of ...
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Bit Synchronizer A6.. 0000110 - ModclkS2 0000111 BitRate_clkS1 BitRate_clkS0 A bit synchronizer can be enabled in receive mode by selecting the synchronous mode (Sync_en=1). The DataClk pin will output a clock with twice the frequency of the bit ...
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Transmitter Power Amplifier A6..A0 D7 0000000 LNA_by 0000001 Modulation1 0000010 CP_HI The maximum output power is approximately 10dBm for a 50 Ω load. For maximum output power the load seen by the PA must be resistive. Higher output power can ...
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Another much more efficient encoding type is 3B4B where three data bits are encoded into a four-bit word. The reason for encoding is to minimize the DC component in the modulated data. To have minimum DC component each four bit ...
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Modulator A6.. 0000100 Mod_F2 Mod_F1 0000101 - - 0000110 - Mod_clkS2 0000111 BitRate_clkS1 BitRate_clkS0 The modulator will create programmable amplitude and waveform is fed into a modulation varactor in the VCO, which will create the desired frequency modulation. ...
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Mod_la Mod_lb Mod_la > Mod_lb Figure 21. Two Different Modulator Current Settings Modulator Attenuator A third way to set the deviation is by programming the modulator attenuator, Mod_A2..Mod_A0, the last being LSB. The purpose of the attenuator is to allow ...
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The modulator filter will not influence the frequency deviation as long as the programmed cut-off frequency is above the actual bit rate. The frequency deviation must be programmed so that the modulation index (2 x single sided frequency deviation/Baudrate [bps]) ...
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XCO_Sign == POS? Yes --> XCO_Present- = XCO_Step // increase LO No --> XCO_Present+ decrease LO XCO_tune bits = CXO_Present Program RFChip Delay > n bits Read FEE FEE > 0? Yes --> XCO_Sign = POS No --> XCO_Sing = ...
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Typical Application L1 50ohm line ANT C6 8n7 2p2 RFVDD Item Part C10 11 C11 12 C12 13 C13 14 R1 ...
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MICRF505BML/YML Land pattern Figure below shows recommended land pattern. Red circles indicate Thermal/RFGND via’s. Recommended size is 0.300-0.350mm with a pitch of 1mm. The recommended minimum number of via’s are 9 and they should be directly connected to ground plane ...
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Layout Considerations The MICRF505 is a highly integrated RF IC with only a few “hot” pins, however it is suggested to study available reference design on www.micrel.com • To ensure the best RF design it is important to plan the ...
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Package Information MICRF505BML October 2006 MICRF505BML 32-Pin MLF (B) 33 M9999-103106 +1 408-944-0800 ...
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Package Information MICRF505YML 5.0 3.10±0.10 5.0 October 2006 3.10±0.10 0.5 0.25 0.4±0. 0.20 0.85±0.05 0.00~0.05 0.2 M9999-103106 +1 408-944-0800 Units mm ...
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Overview of programming bit Address A6.. 0000000 LNA_by PA2 0000001 Modulation1 Modulation0 0000010 CP_HI SC_by IFBias_s IFA_HG 0000011 (“1”) (“1”) 0000100 Mod_F2 Mod_F1 0000101 - - 0000110 - Mod_clkS2 0000111 BitRate_clkS1 BitRate_clkS0 SC_HI ScClk_X2 0001000 (“1”) (“1”) PrescalMode_s ...
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LD_en 1 PF_FC1 0 PF_FC0 0000010 7 CP_HI 6 SC_by 5 VCO_by 4 PA_by 3 OUTS3 2 OUTS2 1 OUTS1 0 OUTS0 0000011 7 IFBias_s 6 IFA_HG 5 VCO_Bias_s 4 VCO_IB2 3 VCO_IB1 2 VCO_IB0 1 VCO_freq1 0 VCO_freq0 ...
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ScClk4 3 ScClk3 2 ScClk2 1 ScClk1 0 ScClk0 0001001 7 PrescalMode_s 6 Prescal_s 5 XCOAR_en 4 XCOtune4 3 XCOtune3 2 XCOtune2 1 XCOtune1 0 XCOtune0 0001010 7 --------- 6 --------- 5 A0_5 4 A0_4 3 A0_3 2 A0_2 ...
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A1_5 4 A1_4 3 A1_3 2 A1_2 1 A1_1 0 A1_0 0010000 7 --------- 6 --------- 5 --------- 4 --------- 3 N1_11 2 N1_10 1 N1_9 0 N1_8 0010001 7 N1_7 6 N1_6 5 N1_5 4 N1_4 ...
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FEE_7 6 FEE_6 5 FEE_5 4 FEE_4 3 FEE_3 2 FEE_2 1 FEE_1 0 FEE_0 October 2006 FEE value, bit 7, MSB FEE value, bit 6 FEE value, bit 5 FEE value, bit 4 FEE value, bit 3 ...
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Table 2: Main Mode bit Mode1 Mode0 State 0 0 Power down 0 1 Standby 1 0 Receive 1 1 Transmit Table 3: Synchronizer mode bit Sync_en State 0 Rx: Bit synchronization off 0 Tx: DataClk pin off 1 Rx: ...
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Table 6: Power amplifier bit PA2 PA1 PA0 PALDc_en turned off by PA2=PA1=PA0=0 ...
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Table 9: PAbuffer bias current setting PA_IB2 PA_IB1 PA_IB0 Table 10: Frequency Error Estimation control bit ...