DJLXT972ALC.A4 Cortina Systems Inc, DJLXT972ALC.A4 Datasheet - Page 54

• Manufacturer Part Number: DJLXT972ALC.A4
• Manufacturer: Cortina Systems Inc

Specifications of DJLXT972ALC.A4

• Lead Free Status / RoHS Status: Not Compliant

LXT972A PHY
Datasheet
249186, Revision 5.2
13 September 2007
Table 27
Table 28
Table 29
7.2
Cortina Systems
10BASE-T PHY Characteristics
10BASE-T Link Integrity Timing Characteristics
Thermal Characteristics
AC Timing Diagrams and Parameters
See the following timing diagrams and AC parameters:
®
Peak differential output
voltage
Transition timing jitter added
by the MAU and PLS
sections
Receive Input Impedance
Differential Squelch
Threshold
Time Link Loss Receive
Link Pulse
Link Min Receive Timer
Link Max Receive Timer
Link Transmit Period
Link Pulse Width
1. Typical values are at 25 °C and are for design aid only, not guaranteed, and not subject to production
Package
Theta-JA
Theta-JC
Psi - JT
• Figure 22, 100BASE-TX Receive Timing, on page 55
• Figure 23, 100BASE-TX Transmit Timing, on page 56
• Figure 24, 10BASE-T Transmit Timing, on page 57
LXT972A Single-Port 10/100 Mbps PHY Transceiver
testing.
Parameter
Parameter
Parameter
1 0x 10 x1.4 64 LD LQFP
58 C/W
27 C/W
3.4 C/W
T
Symbol
T
LR
LR
Tlpw
T
T
Symbol
Tlt
LL
LP
M
M
V
V
Z
AX
OP
–
IN
DS
IN
Value
Min
50
50
60
Min
300
2.2
2
2
8
0
–
Transmitter
Receiver
Typ
Typ
420
2.5
–
–
–
–
–
–
2
–
Max
585
Max
2.8
150
150
150
22
11
24
7
7
Link Pulses
Units
7.2 AC Timing Diagrams and
mV
k Ω
ns
V
Units
ms
ms
ms
ms
ns
With transformer, line
replaced by 100 Ω
resistor
After line model
specified by IEEE
802.3 for 10BASE-T
MAU
Test Conditions
Test Conditions
–
–
Parameters
–
–
–
–
–
–
Page 54