HBLXT9761HC.C4 Intel, HBLXT9761HC.C4 Datasheet - Page 59
HBLXT9761HC.C4
Manufacturer Part Number
HBLXT9761HC.C4
Description
Manufacturer
Intel
Datasheet
1.HBLXT9761HC.C4.pdf
(78 pages)
Specifications of HBLXT9761HC.C4
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Datasheet
TPFOP
Clock/Data pulse width
Clock pulse to Data pulse
Clock pulse to Clock pulse
FLP burst width
FLP burst to FLP burst
Clock/Data pulses per burst
1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production testing.
TPFOP
Figure 32. Auto-Negotiation and Fast Link Pulse Timing
Figure 33. Fast Link Pulse Timing
Table 29. Auto-Negotiation and Fast Link Pulse Timing Parameters
Parameter
Clock Pulse
FLP Burst
t1
t4
Fast Ethernet 10/100 Multi-Port Transceiver with RMII — LXT9761/9781
t2
Sym
t1
t2
t3
t4
t5
–
t5
55.5
Min
111
17
–
–
8
Data Pulse
t1
t3
Typ
100
–
–
2
–
–
1
Max
69.5
139
24
33
–
–
FLP Burst
Clock Pulse
Units
ms
ms
ea
ns
s
s
Test Conditions
–
–
–
–
–
–
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