HBLXT9761HC.C4 Intel, HBLXT9761HC.C4 Datasheet - Page 29
HBLXT9761HC.C4
Manufacturer Part Number
HBLXT9761HC.C4
Description
Manufacturer
Intel
Datasheet
1.HBLXT9761HC.C4.pdf
(78 pages)
Specifications of HBLXT9761HC.C4
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2.5
2.5.1
2.5.1.1
2.5.1.2
2.5.1.3
Datasheet
1. These pins set the default values for registers 0 and 4 accordingly.
2. X = Don’t Care.
3. Do not select Fiber mode with Auto-Negotiation enabled.
AutoNeg
Enabled
Disabled
Mode
Table 9. Hardware Configuration Settings
Desired Configuration
3
10/100
Speed
Mode
100
100
Link Establishment
Auto-Negotiation
The LXT97x1 attempts to auto-negotiate with its counter-part across the link by sending Fast Link
Pulse (FLP) bursts. Each burst consists of 33 link pulses spaced 62.5 s apart. Odd link pulses
(clock pulses) are always present. Even link pulses (data pulses) may be present or absent to
indicate a “1” or a “0”. Each FLP burst exchanges 16 bits of data, which are referred to as a
“page”. All devices that support auto-negotiation must implement the “Base Page” defined by
IEEE 802.3 (registers 4 and 5). The LXT97x1 also supports the optional ‘Next Page’ function
(registers 7 and 8).
Base Page Exchange
By exchanging Base Pages, the LXT97x1 and its link partner communicate their capabilities to
each other. Both sides must receive at least three identical base pages for negotiation to proceed.
Each side finds the highest common capabilities that both sides support. Both sides then exchange
more pages, and finally agree on the operating state of the line.
Next Page Exchange
Additional information, above that required by base page exchange is also sent via “Next Pages’.
The LXT97x1 fully supports the 802.3 method of negotiation via Next Page exchange.
Controlling Auto-Negotiation
When auto-negotiation is controlled by software, the following steps are recommended:
10
Duplex
Mode
Half
Half
Half
Half
Full
Full
Full
Full
Fast Ethernet 10/100 Multi-Port Transceiver with RMII — LXT9761/9781
1
0
0
0
0
1
1
1
1
LED/CFGn_
Pin Settings
2
0
0
1
1
0
0
1
1
1
3
0
1
0
1
0
1
0
1
AutoNeg
0.12
0
1
Control Register
Speed
0.13
0
1
1
Resulting Register Bit Values
FD
0.8
0
1
0
1
0
1
0
1
100FD
4.8
AN Advertisement Register
0
1
0
1
Auto-Negotiation
100TX
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4.7
1
X X X X
10 FD
4.6
2
0
0
1
10T
4.5
0
1
29
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