82P2281PFG IDT, Integrated Device Technology Inc, 82P2281PFG Datasheet - Page 152

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82P2281PFG

Manufacturer Part Number
82P2281PFG
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of 82P2281PFG

Number Of Transceivers
1
Screening Level
Industrial
Mounting
Surface Mount
Package Type
TQFP
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
82P2281PFG
Manufacturer:
IDT
Quantity:
112
T1/J1 RBIF Option Register (046H)
FBITGAP:
DE:
MRSIG.
FE:
CMS:
TRI:
Programming Information
IDT82P2281
Bit Name
Default
Bit No.
Type
This bit is valid in Receive Clock Master mode.
= 0: The F-bit is not gapped.
= 1: The F-bit is gapped (no clock signal during the F-bit).
This bit selects the active edge of RSCK to update the data on RSD and RSIG and the active edge of MRSCK to update the data on MRSD and
= 0: The falling edge is selected.
= 1: The rising edge is selected.
This bit selects the active edge of RSCK to update/sample the pulse on RSFS and the active edge of MRSCK to sample the pulse on MRSFS.
= 0: The falling edge is selected.
= 1: The rising edge is selected.
This bit is valid in Receive Clock Slave T1/J1 mode E1 rate and Receive Multiplexed mode.
= 0: The speed of the RSCK/MRSCK is the same as the data rate on the system side (2.048 MHz / 8.192 MHz).
= 1: The speed of the RSCK/MRSCK is double the data rate on the system side (4.096 MHz / 16.384 MHz).
= 0: The processed data and signaling bits are output on the RSD/MRSD pins and the RSIG/MRSIG pins respectively.
= 1: The output on the RSD/MRSD pins and the RSIG/MRSIG pins are in high impedance.
7
Reserved
6
5
FBITGAP
R/W
4
0
152
SINGLE T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
R/W
DE
3
1
R/W
FE
2
1
CMS
R/W
1
0
August 20, 2009
R/W
TRI
0
1

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