COM20020I3V-DZD-TR Standard Microsystems (SMSC), COM20020I3V-DZD-TR Datasheet - Page 64

• Manufacturer Part Number: COM20020I3V-DZD-TR
• Manufacturer: Standard Microsystems (SMSC)

Specifications of COM20020I3V-DZD-TR

• Number Of Transceivers: 1
• Operating Supply Voltage (typ): 3.3V
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 28
• Lead Free Status / RoHS Status: Compliant

The EF bit also controls the resolution of the following issues from the COM20020I Rev. B:
Tentative ID is used for generating the Network MAP, but it sometimes detects a non-existent node. Every time the
Tentative-ID register is written, the effect of the old Tentative-ID remains active for a while, which results in an
incorrect network map. It can be avoided by a carefully coded software routine, but this requires the programmer to
have deep knowledge of how the COM20020I works. Duplicate-ID is mainly used for generating the Network MAP.
This has the same issue as Tentative-ID.
A minor logic change clears all the remaining effects of the old Tentative-ID and the old Duplicate-ID, when the
COM20020I detects a write operation to Tentative-ID or Node-ID register. With this change, programmers can use
the Tentative-ID or Duplicate-ID for generating the network MAP without any issues. This change is Enabled/Disabled
by the EF bit.
The Mask register is reset by a soft reset in the COM20020I Rev. A, but is not reset in Rev. B. The Mask register is
related to the Status and Diagnostic register, so it should be reset by a soft reset. Otherwise, every time the soft
reset happens, the COM20020I Rev. B generates an unnecessary interrupt since the status bits RI and TA are back
to one by the soft reset.
This is resolved by changing the logic to reset the Mask register both by the hard reset and by the soft reset. The soft
reset is activated by the Node-ID register going to 00h or by the RESET bit going to High in the Configuration
register. This solution is Enabled/Disabled by the EF bit.
Revision 12-06-06
A) Network MAP Generation
B) Mask Register Reset
DATASHEET
64
5Mbps ARCNET (ANSI 878.1) Controller with 2K x 8 On-Chip RAM
SMSC COM20020I 3.3V