ICS87421AMIT IDT, Integrated Device Technology Inc, ICS87421AMIT Datasheet - Page 10

• Manufacturer Part Number: ICS87421AMIT
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Dividerr

Specifications of ICS87421AMIT

• Number Of Clock Inputs: 1
• Mode Of Operation: Differential
• Output Logic Level: LVDS
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: SOIC N
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / RoHS Status: Not Compliant

T
IDT
This section provides information on power dissipation and junction temperature for the ICS87421I.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS87421I is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
flow and a multi-layer board, the appropriate value is 96°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow, and
the type of board (single layer or multi-layer).
ABLE
ICS87421I
÷1/÷2 DIFFERENTIAL-TO-LVDS CLOCK GENERATOR
™
•
The equation for Tj is as follows: Tj =
Tj = Junction Temperature
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
85°C + 0.199W * 96°C/W = 104.1°C. This is well below the limit of 125°C.
/ ICS
JA
A
6. T
= Ambient Temperature
= Junction-to-Ambient Thermal Resistance
Power_
™
Multi-Layer PCB, JEDEC Standard Test Boards
LVDS CLOCK GENERATOR
HERMAL
MAX
= V
R
ESISTANCE
DD_MAX
* I
DD_MAX
= 3.465V * 55mA = 198.58mW
JA
FOR
8-P
DD
JA
= 3.3V + 5% = 3.465V, which gives worst case results.
P
JA
* Pd_total + T
IN
by Velocity (Meters per Second)
OWER
SOIC, F
ORCED
C
A
ONSIDERATIONS
C
10
ONVECTION
96°C/W
0
TM
devices is 125°C.
87°C/W
1
ICS87421AMI REV. A OCTOBER 3, 2007
JA
must be used. Assuming no air
82°C/W
2.5