ICS87421AMIT IDT, Integrated Device Technology Inc, ICS87421AMIT Datasheet

no-image

ICS87421AMIT

Manufacturer Part Number
ICS87421AMIT
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Dividerr
Datasheet

Specifications of ICS87421AMIT

Number Of Clock Inputs
1
Mode Of Operation
Differential
Output Logic Level
LVDS
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.465V
Package Type
SOIC N
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Lead Free Status / RoHS Status
Not Compliant
÷1/÷2 DIFFERENTIAL-TO-LVDS
CLOCK GENERATOR
B
IDT
G
levels. The ICS87421I is characterized to operate from a 3.3V
power supply. Guaranteed part-to-part skew characteristics
make the ICS87421I ideal for those clock distribution applica-
tions demanding well defined performance and repeatability.
HiPerClockS™
IC S
LOCK
ENERAL
/ ICS
F_SEL
LVDS CLOCK GENERATOR
D
nCLK
The ICS87421I is a high perfor mance ÷1/÷2
Differential-to-LVDS Clock Generator and a mem-
ber of the HiPerClockS™ family of High Perfor-
mance Clock Solutions from IDT. The CLK, nCLK
pair can accept most standard differential input
CLK
MR
IAGRAM
D
ESCRIPTION
R
÷1
÷2
0
1
Q
nQ
1
F
• One differential LVDS output
• One differential CLK, nCLK input pair
• CLK, nCLK pair can accept the following differential input
• Maximum clock input frequency: 1GHz
• Translates any single ended input signal (LVCMOS, LVTTL,
• Part-to-part skew: 500ps (maximum)
• Propagation delay: 1.7ns (maximum)
• Additive phase jitter, RMS @ 155.52MHz: 0.17ps (typical)
• Full 3.3V operating supply
• -40°C to 85°C ambient operating temperature
• Available in both standard (RoHS 5) and lead-free (RoHS 6)
levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
GTL) to LVDS levels with resistor bias on nCLK input
packages
EATURES
P
3.90mm x 4.90mm x 1.37mm package body
IN
A
SSIGNMENT
F_SEL
nCLK
CLK
MR
8-Lead SOIC
ICS87421I
M Package
ICS87421AMI REV. A OCTOBER 3, 2007
Top View
1
2
3
4
8
7
6
5
V
Q
nQ
GND
DD
ICS87421I

Related parts for ICS87421AMIT

ICS87421AMIT Summary of contents

Page 1

DIFFERENTIAL-TO-LVDS CLOCK GENERATOR G D ENERAL ESCRIPTION The ICS87421I is a high perfor mance ÷1/÷ Differential-to-LVDS Clock Generator and a mem- HiPerClockS™ ber of the HiPerClockS™ family of High Perfor- mance Clock Solutions from IDT. The CLK, ...

Page 2

ICS87421I ÷1/÷2 DIFFERENTIAL-TO-LVDS CLOCK GENERATOR ABLE IN ESCRIPTIONS ...

Page 3

ICS87421I ÷1/÷2 DIFFERENTIAL-TO-LVDS CLOCK GENERATOR BSOLUTE AXIMUM ATINGS Supply Voltage Inputs, V -0. Outputs Continuous Current 10mA Surge Current 15mA Package Thermal Impedance, JA Storage Temperature, T -65°C to 150°C ...

Page 4

ICS87421I ÷1/÷2 DIFFERENTIAL-TO-LVDS CLOCK GENERATOR T 4D. LVDS DC C ABLE HARACTERISTICS ...

Page 5

ICS87421I ÷1/÷2 DIFFERENTIAL-TO-LVDS CLOCK GENERATOR The spectral purity in a band at a specific offset from the fundamental compared to the power of the fundamental is called the dBc Phase Noise. This value is normally expressed using a Phase noise ...

Page 6

ICS87421I ÷1/÷2 DIFFERENTIAL-TO-LVDS CLOCK GENERATOR P ARAMETER 3.3V V 3.3V±5% DD POWER SUPPLY LVDS + Float GND – 3. UTPUT OAD EST IRCUIT PART 1 nQx Qx PART 2 nQy Qy tsk(pp ...

Page 7

ICS87421I ÷1/÷2 DIFFERENTIAL-TO-LVDS CLOCK GENERATOR IRING THE IFFERENTIAL NPUT TO Figure 2 shows how the differential input can be wired to accept single ended levels. The reference voltage V_REF = V generated by the bias resistors R1, ...

Page 8

ICS87421I ÷1/÷2 DIFFERENTIAL-TO-LVDS CLOCK GENERATOR IFFERENTIAL LOCK NPUT NTERFACE The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL and other differential signals. Both V SWING V and V input requirements. Figures show interface ...

Page 9

ICS87421I ÷1/÷2 DIFFERENTIAL-TO-LVDS CLOCK GENERATOR LVDS D T RIVER ERMINATION A general LVDS interface is shown in Figure 100 differential transmission line environment, LVDS drivers require a matched load termination of 100 3.3V LVDS Driver 100 Differential ...

Page 10

ICS87421I ÷1/÷2 DIFFERENTIAL-TO-LVDS CLOCK GENERATOR This section provides information on power dissipation and junction temperature for the ICS87421I. Equations and example calculations are also provided. 1. Power Dissipation. The total power dissipation for the ICS87421I is the sum of the ...

Page 11

ICS87421I ÷1/÷2 DIFFERENTIAL-TO-LVDS CLOCK GENERATOR ABLE VS IR LOW ABLE FOR JA Multi-Layer PCB, JEDEC Standard Test Boards T C RANSISTOR OUNT The transistor count for ICS87421I is: 417 IDT ™ / ICS ™ ...

Page 12

ICS87421I ÷1/÷2 DIFFERENTIAL-TO-LVDS CLOCK GENERATOR ACKAGE UTLINE UFFIX FOR IDT ™ / ICS ™ LVDS CLOCK GENERATOR SOIC EAD ABLE ACKAGE IMENSIONS ...

Page 13

ICS87421I ÷1/÷2 DIFFERENTIAL-TO-LVDS CLOCK GENERATOR ABLE RDERING NFORMATION ...

Page 14

ICS87421I ÷1/÷2 DIFFERENTIAL-TO-LVDS CLOCK GENERATOR Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 United States 800 345 ...

Related keywords