ICS83940DY IDT, Integrated Device Technology Inc, ICS83940DY Datasheet - Page 10

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ICS83940DY

Manufacturer Part Number
ICS83940DY
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Driverr
Datasheet

Specifications of ICS83940DY

Number Of Clock Inputs
2
Output Frequency
250MHz
Output Logic Level
LVCMOS/LVTTL
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.465V
Package Type
LQFP
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
32
Lead Free Status / RoHS Status
Not Compliant

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IDT™ / ICS™ LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER
ICS83940D
LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER
W
Figure 1 shows how the differential input can be wired to accept
single ended levels. The reference voltage V_REF = V
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The ratio
83940DY
IRING THE
D
Integrated
Circuit
Systems, Inc.
IFFERENTIAL
I
F
NPUT TO
IGURE
Single Ended Clock Input
1. S
A
A
PPLICATION
www.icst.com/products/hiperclocks.html
CCEPT
INGLE
E
C1
0.1u
S
NDED
INGLE
V_REF
LVPECL-
DD
/2 is
S
IGNAL
E
10
10
I
NDED
of R1 and R2 might need to be adjusted to position the V_REF in
the center of the input voltage swing. For example, if the input
clock swing is only 2.5V and V
and R2/R1 = 0.609.
NFORMATION
D
1K
R1
1K
R2
RIVING
VDD
TO
L
EVELS
-LVCMOS / LVTTL F
nPCLK
D
PCLK
IFFERENTIAL
I
NPUT
DD
= 3.3V, V_REF should be 1.25V
L
OW
S
ANOUT
KEW
REV. B JUNE 15, 2004
, 1-
B
TO
UFFER
-18
ICS83940D
TSD

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