ICS83940DY IDT, Integrated Device Technology Inc, ICS83940DY Datasheet

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ICS83940DY

Manufacturer Part Number
ICS83940DY
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Driverr
Datasheet

Specifications of ICS83940DY

Number Of Clock Inputs
2
Output Frequency
250MHz
Output Logic Level
LVCMOS/LVTTL
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.465V
Package Type
LQFP
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
32
Lead Free Status / RoHS Status
Not Compliant

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IDT™ / ICS™ LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER
LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL
FANOUT BUFFER
G
pair can accept LVPECL, CML, or SSTL input levels. The
LVCMOS_CLK can accept LVCMOS or LVTTL input levels.
The low impedance LVCMOS/LVTTL outputs are designed to
drive 50Ω series or parallel terminated transmission lines.
The ICS83940D is characterized at full 3.3V and 2.5V or mixed
3.3V core, 2.5V output operating supply modes. Guaranteed
output and part-to-part skew characteristics make the
ICS83940D ideal for those clock distribution applications
demanding well defined performance and repeatability.
B
83940DY
HiPerClockS™
LVCMOS_CLK
ICS
LOCK
ENERAL
CLK_SEL
nPCLK
PCLK
D
The ICS83940D is a low skew, 1-to-18 LVPECL-
to-LVCMOS/LVTTL Fanout Buffer and a member
of the HiPerClockS™ family of High Performance
Clock Solutions from ICS. The ICS83940D has
two selectable clock inputs. The PCLK, nPCLK
IAGRAM
Integrated
Circuit
Systems, Inc.
D
ESCRIPTION
0
1
www.icst.com/products/hiperclocks.html
18
Q0:Q17
LVPECL-
1
1
P
F
• 18 LVCMOS/LVTTL outputs
• Selectable LVCMOS_CLK or LVPECL clock inputs
• PCLK, nPCLK supports the following input types:
• LVCMOS_CLK accepts the following input levels:
• Maximum output frequency: 250MHz
• Output skew: 150ps (maximum)
• Part to part skew: 750ps (maximum)
• Additive phase jitter, RMS: < 0.03ps (typical)
• Full 3.3V and 2.5V or mixed 3.3V core, 2.5V output
• 0°C to 70°C ambient operating temperature
• Lead-Free package available
• Pin compatible with the MPC940L
IN
LVPECL, CML, SSTL
LVCMOS or LVTTL
supply modes
EATURES
LVCMOS_CLK
TO
A
-LVCMOS / LVTTL F
CLK_SEL
SSIGNMENT
nPCLK
PCLK
GND
GND
V
V
DDO
DD
7mm x 7mm x 1.4mm package body
1
2
3
4
5
6
7
8
32 31 30 29 28 27 26 25
9 10 11 12 13 14 15 16
ICS83940D
32-Lead LQFP
Y Pacakge
Top View
L
OW
ICS83940D
S
ANOUT
KEW
REV. B JUNE 15, 2004
DATA SHEET
24
23
22
21
20
19
18
17
, 1-
ICS83940D
B
TO
Q6
Q7
Q8
V
Q9
Q10
Q11
GND
UFFER
DD
-18
ICS83940D

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ICS83940DY Summary of contents

Page 1

Integrated LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL Circuit FANOUT BUFFER Systems, Inc ENERAL ESCRIPTION The ICS83940D is a low skew, 1-to-18 LVPECL- ICS to-LVCMOS/LVTTL Fanout Buffer and a member HiPerClockS™ of the HiPerClockS™ family of High Performance Clock Solutions from ...

Page 2

Integrated ICS83940D Circuit LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER Systems, Inc ABLE IN ESCRIPTIONS ...

Page 3

Integrated ICS83940D Circuit LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER Systems, Inc BSOLUTE AXIMUM ATINGS Supply Voltage Inputs Outputs Input Current Storage Temperature, T STG 83940DY IDT™ / ICS™ LOW ...

Page 4

Integrated ICS83940D Circuit LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER Systems, Inc ABLE HARACTERISTICS ...

Page 5

Integrated ICS83940D Circuit LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER Systems, Inc ABLE HARACTERISTICS ...

Page 6

Integrated ICS83940D Circuit LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER Systems, Inc ABLE HARACTERISTICS ...

Page 7

Integrated ICS83940D Circuit LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER Systems, Inc. The spectral purity in a band at a specific offset from the funda- mental compared to the power of the fundamental is called the dBc Phase Noise. This value ...

Page 8

Integrated ICS83940D Circuit LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER Systems, Inc. P ARAMETER 1.65V±5% V DD, V DDO LVCMOS GND -1.65V±5% 3.3V C /3. ORE UTPUT OAD 1.25V±5% V DD, V DDO LVCMOS GND -1.25V±5% 2. ...

Page 9

Integrated ICS83940D Circuit LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER Systems, Inc LVCMOS_CLK nPCLK PCLK V DDO 2 Q0:Q17 ➤ t ➤ ROPAGATION ELAY 1.8V 0.5V Clock Outputs ...

Page 10

Integrated ICS83940D Circuit LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER Systems, Inc IRING THE IFFERENTIAL NPUT TO Figure 1 shows how the differential input can be wired to accept single ended levels. The reference voltage V_REF = V ...

Page 11

Integrated ICS83940D Circuit LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER Systems, Inc. LVPECL LOCK NPUT NTERFACE The PCLK /nPCLK accepts LVPECL, CML, SSTL and other differential signals. Both V SWING and V input requirements. Figures ...

Page 12

Integrated ICS83940D Circuit LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER Systems, Inc. θ ABLE VS IR LOW ABLE FOR JA Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern ...

Page 13

Integrated ICS83940D Circuit LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER Systems, Inc ACKAGE UTLINE UFFIX FOR ABLE ...

Page 14

Integrated ICS83940D Circuit LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER Systems, Inc ABLE RDERING NFORMATION ...

Page 15

Integrated ICS83940D Circuit LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER Systems, Inc • • ...

Page 16

ICS650-40A ICS83940D ICS252 ETHERNET SWITCH CLOCK SOURCE LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER FIELD PROGRAMMABLE DUAL OUTPUT SS VERSACLOCK SYNTHESIZER Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device ...

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