ICS854057AG IDT, Integrated Device Technology Inc, ICS854057AG Datasheet - Page 10

• Manufacturer Part Number: ICS854057AG
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Multiplexerr

Specifications of ICS854057AG

• Number Of Clock Inputs: 4/2
• Mode Of Operation: Differential
• Output Frequency: >2000MHz
• Output Logic Level: LVDS
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (typ): 2.5V
• Operating Supply Voltage (max): 2.625V
• Package Type: TSSOP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Signal Type: CML/LVDS/LVPECL/SSTL
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Not Compliant

R
I
PCLK/nPCLK I
For applications not requiring the use of a differential input, both
the PCLK and nPCLK pins can be left floating. Though not
required, but for additional protection, a 1k resistor can be tied
from PCLK to ground.
854057AG
S
Figure 4 shows a schematic example of the ICS854057. In this
example, the PCLK0/nPCLK0 and PCLK1/nPCLK1 inputs are
NPUTS
ECOMMENDATIONS FOR
CHEMATIC
VDD
VDD
:
LVDS
LVPECL
E
NPUT
XAMPLE
Integrated
Circuit
Systems, Inc.
Zo = 50
Zo = 50
Zo = 50
Zo = 50
:
U
NUSED
VDD
F
I
IGURE
NPUT AND
R1
1K
R1
1K
www.icst.com/products/hiperclocks.html
4. E
VDD
R6
18
VDD=2.5V
10
1
2
3
4
5
6
7
8
9
XAMPLE
U1
O
VDD
PCLK0
VT0
nPCLK0
SEL1
SEL0
PCLK1
VT1
nPCLK1
GND
UTPUT
ICS854057 LVDS S
ICS854057
(U1,1)
P
10
INS
C1
0.1u
O
LVDS O
All unused LVDS outputs can be left floating. We recommend
that there is no trace attached. Both sides of the differential
output pair should either be left floating or terminated.
used. The decoupling capacitors should be physically located
near the power pin.
nPCLK3
nPCLK2
PCLK3
PCLK2
UTPUTS
VDD
GND
VDD
VT3
VT2
nQ
Q
4:1
(U1,20)
UTPUT
20
19
18
17
16
15
14
13
12
11
VDD
C2
0.1u
:
OR
WITH
R1
680
R2
680
CHEMATIC
2:1 LVDS C
VDD
I
NTERNAL
R3
680
R4
680
Zo = 50
Zo = 50
I
LOCK
NPUT
ICS854057
R5
100
REV. A OCTOBER 29, 2008
M
T
ERMINATION
ULTIPLEXER
+
-
LVDS