ISP1508AET NXP Semiconductors, ISP1508AET Datasheet - Page 51

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ISP1508AET

Manufacturer Part Number
ISP1508AET
Description
RF Transceiver USB 2.0 ULPI TRNSCVR
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ISP1508AET

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935283548118 ISP1508AET-T

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NXP Semiconductors
Table 27.
Legend: * reset value
Table 28.
Legend: * reset value
Table 29.
Table 30.
ISP1508A_ISP1508B_1
Product data sheet
Bit
7 to 0
Bit
7 to 0
Bit
Symbol
Reset
Access
Bit
7
6
5
Symbol
PRODUCT_ID_
LOW[7:0]
Symbol
PRODUCT_ID_
HIGH[7:0]
Symbol
-
SUSPENDM
RESET
Product ID Low register (address R = 02h) bit description
Product ID High register (address R = 03h) bit description
Function Control register (address R = 04h to 06h, W = 04h, S = 05h, C = 06h) bit allocation
Function Control register (address R = 04h to 06h, W = 04h, S = 05h, C = 06h) bit description
11.1.3 Product ID Low register
11.1.4 Product ID High register
reserved
R/W/S/C
11.2 Function Control register
7
0
The bit description of the Product ID Low register is given in
The bit description of the register is given in
This register controls UTMI function settings of the PHY. The bit allocation of the register
is given in
SUSPEND
Access
R
Access
R
R/W/S/C
Description
reserved
Suspend LOW: Active LOW PHY suspend.
Places the PHY into low-power mode. The PHY will power-down all blocks, except the
full-speed receiver, OTG comparators and ULPI interface pins.
To come out of low-power mode, the link must assert STP. The PHY will automatically clear
this bit when it exits low-power mode.
0b — Low-power mode
1b — Powered
Reset: Active HIGH transceiver reset.
After the link sets this bit, the PHY will assert DIR and reset the digital core. This does not
reset the ULPI interface or the ULPI register set.
When the reset is completed, the PHY will de-assert DIR and automatically clear this bit,
followed by an RXCMD update to the link.
The link must wait for DIR to de-assert before using the ULPI bus.
0b — Do not reset
1b — Reset
M
6
1
Table
Value
15h*
Value
08h*
29.
R/W/S/C
RESET
5
0
Rev. 01 — 14 August 2007
Description
Product ID High: Upper byte of the NXP product ID number; fixed value
of 15h
Description
Product ID Low: Lower byte of the NXP product ID number; fixed
value of 08h
R/W/S/C
4
0
OPMODE[1:0]
R/W/S/C
Table
3
0
ISP1508A; ISP1508B
28.
SELECT
R/W/S/C
TERM
2
0
Table
ULPI HS USB transceiver
27.
R/W/S/C
XCVRSELECT[1:0]
1
0
© NXP B.V. 2007. All rights reserved.
R/W/S/C
0
1
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