XC3SD1800A-4FG676I Xilinx Inc, XC3SD1800A-4FG676I Datasheet - Page 64

• Manufacturer Part Number: XC3SD1800A-4FG676I
• Description: FPGA Spartan®-3A Family 1.8M Gates 37440 Cells 667MHz 90nm Technology 1.2V 676-Pin FBGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3A DSPr

Specifications of XC3SD1800A-4FG676I

• Package: 676FBGA
• Family Name: Spartan®-3A
• Device Logic Units: 37440
• Device System Gates: 1800000
• Maximum Internal Frequency: 667 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 519
• Ram Bits: 1548288
• Number Of Logic Elements/cells: 37440
• Number Of Labs/clbs: 4160
• Total Ram Bits: 1548288
• Number Of I /o: 519
• Number Of Gates: 1800000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 676-BBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With: 122-1574 - KIT DEVELOPMENT SPARTAN 3ADSP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Electronic versions of the package pinout tables and foot- prints are available for download from the Xilinx® website. Using
a spreadsheet program, the data can be sorted and reformatted according to any specific needs. Similarly, the ASCII-text file
is easily parsed by most scripting programs.
Package Overview
Table 60
Table 60: Spartan-3A DSP Family Package Options
Each package style is available as a standard and an environmentally friendly lead-free (Pb-free) option. The Pb-free
packages include an extra ‘G’ in the package style name. For example, the standard “CS484” package becomes “CSG484”
when ordered as the Pb-free option. The mechanical dimensions of the standard and Pb-free packages are similar, as
shown in the mechanical drawings provided in
For additional package information, see UG112: Device Package User Guide.
Mechanical Drawings
Detailed mechanical drawings for each package type are available from the Xilinx web site at the specified location in
Table
Material Declaration Data Sheets (MDDS) are also available on the
Table 61: Xilinx Package Documentation
DS610 (v3.0) October 4, 2010
Product Specification
Notes:
1.
CS484 / CSG484
FG676 / FGG676
CS484
CSG484
FG676
FGG676
Package mass is ±10%.
Package
Package
61.
shows the two low-cost, space-saving production package styles for the Spartan-3A DSP family.
Package Drawing
Package Drawing
Leads
484
676
Drawing
Chip-Scale Ball Grid Array (CS)
Fine-pitch Ball Grid Array (FBGA)
PK230_CS484
PK231_CSG484
PK155_FG676
PK111_FGG676
Type
www.xilinx.com/support/documentation/data_sheets/s3a_pin.zip
MDDS
Table
61.
www.xilinx.com
Maximum
309
519
I/O
Spartan-3A DSP FPGA Family: Pinout Descriptions
Xilinx web site
Lead Pitch
(mm)
0.8
1.0
for each package.
Area (mm)
Footprint
27 x 27
19 x 19
Height
(mm)
1.80
2.60
Mass
1.4
3.4
(g)
(1)
64