XC3SD1800A-4FG676I Xilinx Inc, XC3SD1800A-4FG676I Datasheet - Page 101

FPGA Spartan®-3A Family 1.8M Gates 37440 Cells 667MHz 90nm Technology 1.2V 676-Pin FBGA

XC3SD1800A-4FG676I

Manufacturer Part Number
XC3SD1800A-4FG676I
Description
FPGA Spartan®-3A Family 1.8M Gates 37440 Cells 667MHz 90nm Technology 1.2V 676-Pin FBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3A DSPr

Specifications of XC3SD1800A-4FG676I

Package
676FBGA
Family Name
Spartan®-3A
Device Logic Units
37440
Device System Gates
1800000
Maximum Internal Frequency
667 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
519
Ram Bits
1548288
Number Of Logic Elements/cells
37440
Number Of Labs/clbs
4160
Total Ram Bits
1548288
Number Of I /o
519
Number Of Gates
1800000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
676-BBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
122-1574 - KIT DEVELOPMENT SPARTAN 3ADSP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC3SD1800A-4FG676I
Manufacturer:
XilinxInc
Quantity:
3 000
Part Number:
XC3SD1800A-4FG676I
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC3SD1800A-4FG676I
Manufacturer:
XILINX
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Part Number:
XC3SD1800A-4FG676I
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
Revision History
The following table shows the revision history for this document.
DS610 (v3.0) October 4, 2010
Product Specification
04/02/07
05/25/07
06/18/07
07/16/07
06/02/08
03/11/09
10/04/10
Date
Version
1.0
1.1
1.2
2.0
2.1
2.2
3.0
Initial Xilinx release.
Updates to
VREF pins in XC3S1800A FG676
FPGA
Updated for Production release.
Added Low-power options. Added advance thermal data to
Added
AB14 in CS484 in
Corrected bank designation for SUSPEND to VCCAUX.
Revision update to match other data sheet modules.
(Figure
Package Overview
Table
16) and XC3SD3400A FPGA
59,
Table
Table
63. Updated links.
www.xilinx.com
section. Updated Thermal Characteristics in
63,
Table
(Table
64,
Table
Spartan-3A DSP FPGA Family: Pinout Descriptions
70). Updated FG676 package footprints for XC3SD1800A
(Figure
Revision
65,
Table
17). Minor edits.
66,
Table
Table
62.
67,
Table
Table
68,
62. Corrected name for
Table
69. Corrected
101

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