P89CV51RC2FA NXP Semiconductors, P89CV51RC2FA Datasheet - Page 8

• Manufacturer Part Number: P89CV51RC2FA
• Description: MCU 8-Bit 89C 80C51 CISC 32KB Flash 5V 44-Pin PLCC Tube
• Manufacturer: NXP Semiconductors

Specifications of P89CV51RC2FA

• Package: 44PLCC
• Device Core: 80C51
• Family Name: 89C
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 32
• Interface Type: SPI/UART
• Number Of Timers: 3
• Ram Size: 1 KB
• Program Memory Size: 32 KB
• Program Memory Type: Flash
• Operating Temperature: -40 to 85 °C

NXP Semiconductors
Table 3.
[1]
[2]
P89CV51RB2_RC2_RD2_3
Product data sheet
Symbol
RST
EA
ALE
XTAL1
XTAL2
V
V
DD
SS
ALE loading issue: When ALE pin experiences higher loading (> 30 pF) during the reset, the microcontroller may accidentally enter into
modes other than normal working mode. The solution is to add a pull-up resistor from 3 k to 50 k between e.g., ALE pin and V
For 6-clock mode, ALE is emitted at
P89CV51RB2/RC2/RD2 Pin description
Pin
PLCC44
10
35
33
21
20
44
22
TQFP44
4
29
27
15
14
38
16
1
3
Type
I
I
I/O
I
O
supply
supply
of crystal frequency.
Description
Reset: While the oscillator is running, a HIGH logic state on this pin for two
machine cycles will reset the device.
External Access Enable: EA must be connected to V
the device to fetch code from the external program memory. EA must be
strapped to V
Address Latch Enable: ALE is the output signal for latching the low byte of
the address during an access to external memory. Normally the ALE
emitted at a constant rate of
external timing and clocking. One ALE pulse is skipped during each access
to external data memory. However, if bit AO is set to 1, ALE is disabled.
Crystal 1: Input to the inverting oscillator amplifier and input to the internal
clock generator circuits.
Crystal 2: Output from the inverting oscillator amplifier.
Power supply
Ground
Rev. 03 — 25 August 2009
…continued
DD
for internal program execution.
P89CV51RB2/RC2/RD2
1
6
the crystal frequency
80C51 with 1 kB RAM, SPI
[2]
SS
and can be used for
© NXP B.V. 2009. All rights reserved.
in order to enable
[1]
8 of 76
is
DD
.